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Aptitude
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Aptitude
General Knowledge
Verbal Reasoning
Computer Science
Interview
Take Free Test
Memory and Storage Questions
Address multiplexing is used to reduce the number of address lines.
ROMs are used to store data that generally cannot be easily changed.
A write operation may also be referred to as a "fetch" operation.
ROMs are used to store data on a permanent basis.
The most widespread application of ROMs is in the storage of data and program codes that must be available on power-down in the microprocessor-based systems. These data and program codes are called firmware because they are firmly stored in hardware.
The TMS44100 4M × 1 DRAM does not have a chip select (SC) input.
A CD player is an example of a device that has random access capability.
A term often used commercially to refer to read/write memory is sequential-access memory.
If a memory design allows a storage location to be accessed without first sequencing through other locations, it is called Random Access Memory.
Flash memories are frequently used in place of floppy or small-capacity hard disk drives in portable computers.
EEPROM and Flash memory are electrically erasable.
The floating-gate MOSFET is the actual storage element for EEPROMs. An electron charge will remain on the floating gate for more than 10 years unless drained off electrically.
More than one bit of data can occupy each memory cell.
PROMs are basically the same as mask ROMs, once they have been programmed.
Once a PROM is programmed it can be changed by applying a small electrical charge.
DRAM chips can be combined for larger capacity and word sizes using the same methods as for other memory types.
A nibble is a group of eight bits.
When a computer is executing a program of instructions, the CPU continually fetches information from those locations in memory that contain (1) the program codes representing the operations to be performed and (2) the data to be operated upon.
DRAM uses a cross-transistor configuration.
When two or more devices try to send their own digital levels to a shared data bus at the same time, bus contention will take place.
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