Difficulty: Easy
Correct Answer: Correct
Explanation:
Introduction / Context:
Memory devices are categorized by how data is accessed. This question targets the fundamental definition: RAM provides essentially uniform-time access to any address, while sequential devices do not. Recognizing this distinction is critical when designing address decoders and timing interfaces.
Given Data / Assumptions:
Concept / Approach:
Random access memory allows direct read/write to any location through address decoding, independent of the position accessed previously. Both SRAM and DRAM satisfy this property. Therefore, if a memory design allows access without sequencing through other locations, it meets the definition of RAM.
Step-by-Step Solution:
Verification / Alternative check:
DRAM timing diagrams show row/column selects to reach any cell; SRAM uses wordline/bitline selection. Neither requires scanning earlier addresses, unlike tape or linked serial EEPROMs with pointer stepping.
Why Other Options Are Wrong:
Limiting to SRAM excludes DRAM unnecessarily. Battery backing concerns retention, not access mode. Word alignment does not change random access capability.
Common Pitfalls:
Confusing volatility (RAM loses data without power) with access classification; not all nonvolatile memories are sequential and not all RAM must be volatile conceptually.
Final Answer:
Correct
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