Curioustab
Aptitude
General Knowledge
Verbal Reasoning
Computer Science
Interview
Aptitude
General Knowledge
Verbal Reasoning
Computer Science
Interview
Interfacing to the Analog World Questions
In a binary-weighted D/A converter the sum of all the currents from the binary weighted resistors flows through the operational amplifier.
The main advantage of the SAR ADC method is its high speed.
Resolution in the analog output of a DAC is primarily dependent on the number of input binary bits.
The delay between a change on the digital input of a DAC and the appearance of the change on the output is called settling time.
The DSO ________, ________, and ________ analog waveforms.
The AD7524, a CMOS IC available from several IC manufacturers, is an eight-bit D/A converter that uses a(n) ________.
A digital voltmeter converts an analog voltage to its ________ representation.
The figure given below represents a ________.
A(n) ________ converts an analog input to a digital output.
For each bit that is added to a digital ramp ADC, the conversion time ________.
A 4-bit stairstep-ramp A/D converter has a clock frequency of 100 kHz and a maximum input of 10 V, and has 6 V applied to the input. The conversion time will be ________.
The stability of the ADC process can be improved by using a(n) ________ to hold the analog voltage constant while the A/D conversion is taking place.
There are many applications in which analog data must be digitized and transferred into a computer's memory. The process by which the computer acquires these digitized analog data is referred to as ________.
A simultaneous A/D converter is also known as a(n) ________ A/D converter.
A major application for DSP is in ________ and ________ of analog signals.
The input of an analog-to-digital converter is ________.
The characteristic that a change of one binary step on the input of a DAC should cause exactly one step change on the output is called ________.
On a binary-weighted D/A converter the least significant binary input ________.
________ ADCs use no clock signal, because there is no timing or sequencing required.
The circuit shown below is a(n) ________.
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