Difficulty: Easy
Correct Answer: flash
Explanation:
Introduction / Context:
ADC architectures vary in speed and complexity. The fastest class compares the input to many thresholds simultaneously using a bank of comparators and a priority encoder. Knowing the common names aids datasheet reading and part selection.
Given Data / Assumptions:
Concept / Approach:
The parallel-comparator design is widely called a “flash” ADC because the conversion completes in a few gate delays, effectively in a flash, instead of iterating bit decisions sequentially like SAR or integrating converters.
Step-by-Step Solution:
Verification / Alternative check:
Why Other Options Are Wrong:
Common Pitfalls:
Final Answer:
Discussion & Comments