Difficulty: Easy
Correct Answer: flash
Explanation:
Introduction / Context: ADC architectures vary in speed and complexity. The fastest class compares the input to many thresholds simultaneously using a bank of comparators and a priority encoder. Knowing the common names aids datasheet reading and part selection.Given Data / Assumptions:
Concept / Approach: The parallel-comparator design is widely called a “flash” ADC because the conversion completes in a few gate delays, effectively in a flash, instead of iterating bit decisions sequentially like SAR or integrating converters.Step-by-Step Solution:
Split the reference into 2^N − 1 thresholds via a resistor ladder.Compare input against all thresholds in parallel comparators.Encode the thermometer output into an N-bit binary code.Verification / Alternative check:
Texts and vendors consistently use “flash ADC” for this architecture.Why Other Options Are Wrong:
synchronous / asynchronous: Refer to clocking, not this architecture’s defining trait.comparator: A component inside an ADC; not the architecture’s name.Common Pitfalls:
Assuming “flash” implies optical; it refers to speed.Final Answer:
flash
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