Stabilizing A/D conversion — To keep the analog input constant while the ADC is converting, which circuit should be used?

Introduction / Context:
During an A/D conversion, many architectures require a stable input over the conversion interval. If the source is moving (sensor drift, mains ripple, or multiplexed channels), the ADC may sample inconsistent values across its internal phases unless the signal is briefly “frozen.”

Given Data / Assumptions:

• We need to hold the analog voltage constant for microseconds to milliseconds.
• The ADC may be successive-approximation, integrating, or sigma-delta with defined sampling instants.
• Source impedance may be high, necessitating buffering.

Concept / Approach:
A sample-and-hold (S/H) circuit samples the input onto a capacitor through a switch, then opens the switch, isolating the capacitor to hold the voltage while the ADC processes. A buffer amplifier with low leakage minimizes droop, preserving accuracy throughout conversion.

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