Tracking (servo) ADC vs. stairstep-ramp ADC: Identify the principal advantage of a tracking ADC when compared with a simple stairstep-ramp (counter-ramp) ADC.

Introduction / Context:
Both tracking (servo) ADCs and stairstep-ramp ADCs use a DAC and comparator, but they differ in how the digital code evolves. A tracking ADC employs an up/down counter that continually adjusts, “tracking” the input, whereas a stairstep-ramp ADC restarts from zero for each conversion. This architectural difference affects speed and responsiveness.

Given Data / Assumptions:

• Tracking ADC: up/down counter, adjusts code by ±1 LSB per step toward V_in.
• Stairstep-ramp ADC: up counter always ramps up from zero until reaching V_in.
• Same DAC resolution and clock rate assumed for fair comparison.

Concept / Approach:
The worst-case conversion time for a stairstep-ramp ADC is proportional to the code value (must count from 0 to the target). In contrast, a tracking ADC starts at the previous code and only moves as many steps as the input has changed. For slowly varying inputs, the number of steps per sample is small, yielding much faster effective conversions after the first acquisition.

Step-by-Step Solution:

Verification / Alternative check:
Sequence diagrams show a tracking ADC dithering by ±1 LSB for constant inputs and quickly following small ramps. Counter-ramp traces restart and take longer on average, particularly for mid-scale and high-scale values.

Why Other Options Are Wrong:

• Does not require a counter: A tracking ADC explicitly uses an up/down counter.
• Indicate polarity / measure positive and negative: While up/down direction reflects error polarity, that is not the key advantage cited.

Common Pitfalls:
Judging “speed” only by first conversion; in steady operation, tracking excels because it starts near the answer.

Final Answer:
it is faster