Programmable Logic Device Questions

• Which is not a part of a GAL16V8's OLMC?
• How many macrocells are in a MAX700S LAB?
• Now many times can a GAL be erased and reprogrammed?
• The Altera MAX 7000 series ________.
• Which of the following testing procedures uses the JTAG IEEE standard?
• What is the defining difference between microprocessor/DSP systems and other digital systems?
• Each programmable array logic (PAL) gate product is applied to an OR gate and, if combinational logic is desired, the product is ORed and then:
• The complex programmable logic device (CPLD) contains several PAL-type simple programmable logic devices (SPLDs) called:
• Which is a mode of operation of the GAL16V8?
• Expanders make it possible to increase the number of terms in a programmable SOP operation.
• All inputs to the MAX7000S device and all macrocell outputs feed the PIA.
• Using a hardware solution for your digital system design is always faster than a software solution.
• Most complex digital designs include a mix of different hardware categories.
• With microcomputer/DSP systems, devices can be electronically controlled and data can be manipulated by executing a program of instructions that has been written for the application.
• The SRAM technology is volatile.
• PLDs cannot meet all the possible requirements of complex digital circuitry.
• The GAL chip uses an EEPROM array that is erasable and reprogrammable at least 1000 times.
• In a PLD, a blown fuse at an OR gate is a LOW and a blown fuse at an AND gate is a HIGH.
• The schematic editor allows you to connect with predefined logic symbols.
• Gate arrays are ULSI circuits that offer hundreds of thousands of gates.