Curioustab
Aptitude
General Knowledge
Verbal Reasoning
Computer Science
Interview
Aptitude
General Knowledge
Verbal Reasoning
Computer Science
Interview
Integrated-Circuit Logic Families Questions
A logic signal experiences a delay in going through a circuit. The two propagation delay times are defined as:
What is the increase in switching speed between 74LS series TTL and 74HC/HCT (High-Speed CMOS)?
What type of circuit is shown below, and how is the output ordinarily connected?
Generally, the voltage measured at an unused TTL input would typically be measured between:
Refer the given figure. Which of the following describes the operation of the circuit?
What must be done to interface TTL to CMOS?
What is unique about TTL devices such as the 74S00?
What type of circuit is represented in the given figure, and which statement best describes its operation?
Which of the following summarizes the important features of ECL?
Logic circuits that are designated as buffers, drivers, or buffer/drivers are designed to have:
Power-supply decoupling uses a radio-frequency capacitor to short out high frequency spikes.
The CMOS series that is pin-compatible with the TTL family is the 4000 series.
The fan-out of CMOS gates is frequency dependent.
The 74XX series TTL operates using saturated switching in which many of the transistors, when conducting, will be in the saturated condition.
The maximum current for a LOW output on a standard TTL gate is 100 µA.
A major drawback in using ECL logic circuits in conjunction with TTL and MOS circuits is its negative supply voltages and logic levels.
Integrated injection logic offers high component density and is easier to fabricate than TTL.
The noise immunity of a logic circuit refers to the circuit's ability to tolerate noise by causing spurious charges in the output voltage.
A current-sourcing transistor may also be referred to as a pull-down transistor.
An unused input of a NAND gate can be left unconnected, pulled high by a pull-up resistor and tied together with another input and not change the logic output.
1
2
3
4
5