Integrated-Circuit Logic Families Questions

• The data sheet for the 74 series of TTL ICs shows that Vcc has a range of 4.5 V to 5.5 V.
• The dc noise margins calculated using the proper values from a standard TTL data sheet are the worst-case margins. The typical dc noise margins are usually somewhat higher.
• The logic family with the highest maximum clock frequency is HS-TTL.
• ECL gates are noted for their high frequency capability and small output voltage swing.
• The upper transistor of a totem-pole output is OFF when the gate output is low.
• The major advantage of TTL logic circuits over CMOS is lower propagation delay.
• The principal advantage of MOS ICs over TTL ICs is their fast operating speed.
• Due to the extremely low power requirements of CMOS logic circuits, any number of CMOS and TTL gates can be interconnected.
• Most TTL gates use the totem-pole output arrangement.
• The output current capability for a HIGH output condition is called a source current.
• The maximum output voltage recognized as a LOW by a TTL gate is 2.0 V.
• When the outputs of several standard TTL gates are connected together, the gate outputs produce more fan-out.
• ________ is ideally suited for applications using battery power or battery backup power.
• In a DIP the spacing between pins is typically ________.
• A logic probe is placed on the output of a digital circuit and the probe lamp is dimly lit. This display indicates ________.
• The output current for a LOW output is called a(n) ________.
• The number of gates that can be connected to a single output without exceeding the current ratings of the gate is called ________.
• The HIGH logic level for a standard TTL output must be at least ________.
• The power dissipation of a CMOS IC will ________.
• The minimum input voltage recognized as HIGH by a TTL gate is ________.