Difficulty: Easy
Correct Answer: Incorrect
Explanation:
Introduction / Context:
Classic TTL output stages are asymmetric: they can sink substantially more current when driving a LOW than they can source when driving a HIGH. Recognizing this asymmetry matters for fan-out planning and interfacing to LEDs or other loads.
Given Data / Assumptions:
Concept / Approach:
Because TTL can sink much more current than it can source, it is common to wire LEDs to Vcc with the TTL output sinking current when LOW. The statement claims the opposite relationship and is therefore incorrect.
Step-by-Step Solution:
Verification / Alternative check:
Any TTL or 74LS/74ALS datasheet confirms the asymmetry; application notes recommend sinking loads for better current capability and logic-level compliance.
Why Other Options Are Wrong:
Common Pitfalls:
Assuming symmetric drive because CMOS outputs are often near-symmetric; forgetting that TTL’s design heritage is different.
Final Answer:
Incorrect
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