Curioustab
Aptitude
General Knowledge
Verbal Reasoning
Computer Science
Interview
Aptitude
General Knowledge
Verbal Reasoning
Computer Science
Interview
Integrated-Circuit Logic Families Questions
________ is ideally suited for applications using battery power or battery backup power.
In a DIP the spacing between pins is typically ________.
A logic probe is placed on the output of a digital circuit and the probe lamp is dimly lit. This display indicates ________.
The output current for a LOW output is called a(n) ________.
The number of gates that can be connected to a single output without exceeding the current ratings of the gate is called ________.
The HIGH logic level for a standard TTL output must be at least ________.
The power dissipation of a CMOS IC will ________.
The minimum input voltage recognized as HIGH by a TTL gate is ________.
When the outputs of several open-collector TTL gates are connected together, the gate outputs ________.
The ________ is defined as the maximum number of standard logic inputs that an output can drive reliably.
The propagation delay of standard TTL gates is approximately ________.
The 74F-Fast TTL integrated-circuit fabrication technique uses reduced interdevice ________ to achieve reduced propagation delays.
________ TTL allows three possible output states.
One advantage that MOSFET transistors have over bipolar transistors is ________.
When the output of a standard TTL gate is HIGH, it can ________.
Totem-pole outputs ________ be connected ________ because ________.
A logic probe is placed on the input of a digital circuit and the probe lamp blinks slowly, indicating ________.
The lower transistor of a totem-pole output is saturated when the gate output is ________.
Several manufacturers have developed logic that combines the best features of TTL and CMOS. This is called ________.
________ output levels would not be a valid LOW for a TTL gate.
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