Flip-Flops Questions

• What is the difference between the 7476 and the 74LS76?
• With regard to a D latch, ________.
• Which of the following best describes the action of pulse-triggered FF's?
• The phenomenon of interpreting unwanted signals on J and K while Cp (clock pulse) is HIGH is called ________.
• What is one disadvantage of an S-R flip-flop?
• Which of the following describes the operation of a positive edge-triggered D flip-flop?
• Master-slave J-K flip-flops are called pulse-triggered or level-triggered devices because input data is read during the entire time the clock pulse is at a LOW level.
• Four positive edge-triggered D flip-flops are used to store a 4-bit binary number as shown below. Determine if the circuit is functioning properly, and if not, what might be wrong.
• The symbols on this flip-flop device indicate ________.
• To completely load and then unload an 8-bit register requires how many clock pulses?
• A 555 operating as a monostable multivibrator has a C1 = 100 µF. Determine R1 for a pulse width of 500 ms.
• As a general rule for stable flip-flop triggering, the clock pulse rise and fall times must be:
• Propagation delay time, tPLH, is measured from the ________.
• The output pulse width of a 555 monostable circuit with R1 = 4.7 kΩ and C1 = 47 µF is ________.
• What does the triangle on the clock input of a J-K flip-flop mean?
• What is another name for a one-shot?
• An invalid condition in the operation of an active-HIGH input S-R latch occurs when ________.
• The timing network that sets the output frequency of a 555 astable circuit contains ________.
• If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be ________.
• What is the difference between the enable input of the 7475 and the clock input of the 7474?