Flip-Flops Questions

• Some flip-flops have invalid states.
• A positive edge-triggered flip-flop changes states with a HIGH-to-LOW transition on the clock input.
• ICs can perform sequential operations, including counting and data shifting.
• It takes four flip-flops to act as a divide-by-4 frequency divider.
• An astable multivibrator is sometimes referred to as a clock.
• The 7476 and 74LS76 are both dual flip-flops.
• An input which can only be accepted when an enable or trigger is present is called asynchronous.
• The key to edge-triggered sequential circuits in VHDL is the ________.
• Setup time specifies ________.
• The inputs on a 7474 D flip-flop are S, R, D, and CLK ________ is/are synchronous.
• An edge-triggered flip-flop can change states only when ________.
• The 74121 nonretriggerable multivibrator can have the output pulse set by a single external component. This component is a(n) ________.
• In VHDL, each instance of a component is given a name followed by a ________ and the name of the library primitive.
• In synchronous systems, the exact times at which any output can change state are determined by a signal commonly called the ________.
• Assume a J-K flip-flop has 1s on the J and K inputs. The next clock pulse will cause the output to ________.
• If an input is activated by a signal transition, it is ________.
• Most people would prefer to use ________ over HDL.
• The major advantage of a Schmitt trigger input is that it ________.
• Regardless of whether you develop a description in AHDL or VHDL, the circuit's proper operation can be verified using a ________.
• When the output of the NOR gate S-R flip-flop is Q = 0 and , the inputs are: