Digital System Projects Using HDL Questions

• In the digital clock project, the 60 Hz signal is sent through a Schmitt-trigger circuit to produce square pulses at the rate of ________.
• In the keypad encoder, the ________ activate(s) the freeze bit only when one column is low.
• A very critical dimension in project management is ________.
• The interface of the stepper motor needs to operate in one of ________ mode(s).
• In the keypad encoder, just after the 4 ms mark, the simulation initiates the release of the key by changing the column value to ________, which causes the d output to go into its Hi-Z state.
• In the digital clock design, the hours section is different from the seconds and minutes section in that it never goes to ________.
• One aspect of project planning and management is the selection of ________ that will best fit the application.
• In the digital clock project, the 1 pps signal is used as a synchronous clock for all of the counter stages, which are ________.
• Each ________, starting at the simplest level, should be built in HDL.
• In the frequency counter, the control clock is derived from the ________ by frequency dividers controlled in the control and timing block.