Curioustab
Aptitude
General Knowledge
Verbal Reasoning
Computer Science
Interview
Aptitude
General Knowledge
Verbal Reasoning
Computer Science
Interview
Digital System Projects Using HDL Questions
In the frequency counter, what is the function of the Schmitt trigger circuit?
In a digital clock application, the basic frequency must be divided down to:
Which is not a step used to define the scope of an HDL project?
In the frequency counter, when is the new count stored in the display register?
In the digital clock project, what is the frequency of the MOD-6 counter in the minutes section?
In the frequency counter, if the clock generator produces a 100 kHz system clock signal, how many decade counters are required to measure 1 Hz?
In the digital clock project, when does the PM indicator go high?
Which is not a step in strategic planning for HDL development?
In a frequency counter, what happens at high frequencies when the sampling interval is too long?
In the keypad application, just after the 4 ms mark the simulation imitates the release of the key by changing the column value back to F hex, which causes the d output to go into its Hi-Z state. On the next rising clock edge, what happens to dav?
In the frequency counter, the pulse width of the enable signal is very critical for taking an accurate frequency measurement.
A frequency counter is a circuit that can measure and display the frequency of a signal.
In the digital clock project HDL, the 1 pps signal is used as a synchronous clock for all of the counters' stages, which are synchronously cascaded.
In the digital clock project, the 60 Hz signal is sent through a Schmitt-trigger circuit to produce sine wave pulses at the rate of 60 pps.
One CASE construct inside another CASE construct is called a do-loop.
In HDL when a circuit is simulated on a computer, the designer must create all the different scenarios that will be experienced by the actual circuit and must also know the proper response to those inputs.
The wave-drive sequence of a stepper motor has more torque and operates more smoothly than the full-step sequence at moderate speeds.
One of the first steps in any HDL project is to define its scope by naming each input and output.
In HDL, one of the strategies used in strategic planning is to find a way to test each piece of the project.
Top-down design means that we start at the highest level of the hierarchy, or that the entire project is considered to exist in a closed dark box with inputs and outputs.
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