Digital System Projects Using HDL Questions

• In an HDL stepper motor design, why is there more than one mode?
• For the frequency counter, which is not a control signal from the control and timing block?
• List three basic blocks in the digital clock project.
• In the keypad application, what does the preset state of the ring counter define?
• Which is not a step that should be followed in project management?
• What are two ways to remember the current state of a counter in VHDL?
• In a full-step sequence involving two flip-flops driving four coils of a stepper motor, how far will the stepper motor step?
• In the digital clock project, what type of counter is used to count to 59 seconds?
• In an HDL application of a stepper motor, after an up/down counter is built what is done next?
• What does the ring counter in the HDL keypad application do when a key is pressed?
• What must a stepper motor HDL application include?
• In the keypad application, what does the data signal define?
• When designing an HDL digital system, which is the worst mistake one can make?
• In the keypad application, when all columns are HIGH, the ring counter is enabled and counting, and dav is LOW, what is the status of the d outputs?
• How is the output frequency related to the sampling interval of a frequency counter?
• What does the major block of an HDL code emulation of a keypad include?
• Why should a real hardware functional test be performed on the HDL stepper motor design?
• The accuracy of the frequency counter depends on the:
• Which is not a major block of an HDL frequency counter?
• In the digital clock project, the purpose of the frequency prescaler is to: