Question 1

Need for a freewheeling diode in controlled rectifiers In a controlled rectifier, for which type of load is a freewheeling diode essential to protect devices and stabilize current?

Accepted Answer

Introduction / Context: Freewheeling (flywheel) diodes are standard practice in converters feeding inductive loads. They provide an alternate path for current when the main device turns off, preventing large voltage spikes and current discontinuity. Given Data / Assumptions: Single-phase or three-phase controlled rectifier. Load may contain significant inductance. Concept / Approach: Inductors resist instantaneous changes in current. When the controlled device commutates off or the source reverses, the inductor attempts to keep current flowing. The freewheeling diode conducts this current, clamping the voltage and maintaining continuity. Step-by-Step Solution: Main device turns off or supply polarity reverses.Inductor current needs a path; otherwise, di/dt generates large overvoltage.Freewheeling diode conducts, circulating current through the load and diode until energy decays. Verification / Alternative check: Waveforms show smoother current and reduced commutation stress with the diode present; without it, severe voltage overshoots occur. Why Other Options Are Wrong: Resistive loads do not store energy; a freewheeling path is not essential. Capacitive loads need careful inrush limiting, not a flywheel path. “Any of the above” overgeneralizes. Common Pitfalls: Placing the diode incorrectly (polarity matters). Undersizing the diode for current and thermal limits. Final Answer: Inductive

Question 2

MOS-controlled thyristor (MCT) terminals How many external leads does a typical MOS-controlled thyristor provide?

Accepted Answer

Introduction / Context: The MOS-controlled thyristor (MCT) integrates MOS-gated control with a thyristor structure. Knowing its terminal count aids in understanding gate-driving and packaging conventions. Given Data / Assumptions: Standard discrete MCT device. Conventional notation: anode (A), cathode (K), and gate (G). Concept / Approach: Like GTOs and IGBTs, MCTs expose a control terminal. Thus, three terminals are used: two power terminals (A and K) and one control terminal (G). Internally, complementary MOS structures provide turn-on and turn-off capability. Step-by-Step Solution: Identify power path: anode to cathode.Identify control: gate terminal for MOS-controlled action.Therefore, total external leads = 3. Verification / Alternative check: Datasheets show A, K, G pins; no separate auxiliary cathode is normally brought out in standard packages. Why Other Options Are Wrong: 2 leads would imply uncontrolled device (no gate). 4 or more leads are not typical for MCTs. “2 or 3” is ambiguous; standard is 3. Common Pitfalls: Confusing MCT with TRIAC (three terminals but AC bidirectional control). Final Answer: 3

Question 3

Reducing thyristor turn-on time with an R–L load A thyristor feeds an R–L load. Which change shortens the device turn-on time by accelerating current rise to the latching level?

Accepted Answer

Introduction / Context: To latch, a thyristor requires its anode current to exceed the latching current quickly after gate triggering. With R–L loads, the initial di/dt is limited by circuit parameters, which directly affects the apparent turn-on time. Given Data / Assumptions: L defines the rate of current rise, di/dt ≈ (V − E − iR)/L at turn-on. R influences steady-state current and instantaneous voltage division. Concept / Approach: Because di/dt is inversely proportional to L, reducing L most effectively increases the current rise slope toward the latching current, shortening turn-on. Lowering R can help, but L is the dominant constraint on di/dt in R–L loads. Step-by-Step Solution: At triggering: i ≈ 0, so di/dt ≈ V/L (neglecting small drops).Reducing L increases di/dt, reaching latching current faster.Thus, decreasing L is the single most effective change to reduce turn-on time. Verification / Alternative check: Waveform simulation shows larger L yields slower current ramp and potential mis-latch under the same gate pulse; smaller L secures latching sooner. Why Other Options Are Wrong: (a) Lower R helps somewhat, but L dominates the slope. (c) Increasing L slows di/dt and lengthens turn-on time. (d) Although reducing both may help, the question asks for the change that reduces turn-on time; decreasing L alone is sufficient and primary. (e) Increasing R reduces current and slows latching. Common Pitfalls: Overemphasizing R; at the instant of turn-on, inductance dominates di/dt. Final Answer: Decreasing L only

Question 4

Stud-mounted SCR hardware In a stud-mounted SCR package, the stud is electrically connected to which terminal?

Accepted Answer

Introduction / Context: Mechanical packaging of power devices affects thermal design and electrical connections. Stud-mounted SCRs attach the device to a heat sink via a threaded stud that is also an electrical terminal. Given Data / Assumptions: Standard stud-mounted SCR package. Conventional polarity conventions: anode (top), cathode (stud). Concept / Approach: Most stud-mounted SCRs bring the cathode out through the stud to simplify mounting and to keep the heat sink at cathode potential. The anode and gate are provided as separate top connections. Step-by-Step Solution: Inspect package drawings: stud threaded base connects internally to the cathode layer stack.Anode is the top terminal, gate is a small auxiliary terminal.Therefore, the stud = cathode. Verification / Alternative check: Manufacturer datasheets consistently mark the stud as K (cathode) for typical SCRs. Why Other Options Are Wrong: Anode: not used for stud in standard SCR packages. Gate: always a separate low-power lead. Selectable: not in standard devices. Floating: contradicted by design. Common Pitfalls: Assuming TRIAC packages follow the same convention; check datasheets. Final Answer: Cathode

Question 5

Assertion–Reason on AC regulators Assertion (A): An AC voltage regulator uses natural (line) commutation. Reason (R): An AC regulator can be used for static on-load tap changing of a transformer.

Accepted Answer

Introduction / Context: AC regulators (phase-controlled AC controllers) vary RMS voltage by delaying SCR firing on each half-cycle. Their turn-off mechanism uses the natural current zero crossing of the AC source. Given Data / Assumptions: Standard single- or three-phase AC regulator using antiparallel SCRs or TRIACs. Transformer tap changing with electronic switching is a valid application. Concept / Approach: Natural commutation occurs when the alternating source forces current through zero, removing holding current so the device turns off. This is independent of whether the application is tap changing or general voltage control. Step-by-Step Solution: Assess A: True—AC regulators rely on line current zero crossing for turn-off.Assess R: True—AC regulators can implement static on-load tap changing.Causality: The ability to do tap changing does not explain why commutation is natural. Hence, R is not the correct explanation of A. Verification / Alternative check: Any phase-controlled load (no DC link) naturally commutates at source zero crossing regardless of the load type. Why Other Options Are Wrong: (a) Incorrect because R is not the reason for A. (c) and (d) wrongly negate a correct statement. (e) Both are not wrong. Common Pitfalls: Confusing forced commutation (DC converters) with natural commutation (AC regulators). Final Answer: Both A and R correct but R is not correct explanation of A

Question 6

DC chopper feeding an R–L–E load at duty cycle a = 1 When a step-down chopper has duty ratio a = 1 (switch always ON), what is the relationship between the minimum and maximum load current over a switching period?

Accepted Answer

Introduction / Context: In buck choppers feeding R–L–E loads, the inductor current usually ripples because the inductor sees different voltages during ON and OFF intervals. If the duty ratio a equals 1, the switch never turns OFF. Given Data / Assumptions: Ideal buck chopper, a = 1. Load model R–L–E (back-emf source E). Steady-state operation. Concept / Approach: With a = 1, the inductor is connected continuously to the input source. There is no alternating ON/OFF in a switching sense within a period, so the inductor voltage is essentially constant after transients. A constant inductor voltage implies no periodic current ripple. Step-by-Step Solution: For a = 1: v_L = V_in − R*i − E.In steady state, the average di/dt over a period is zero; with no switching intervals, the periodic ripple component disappears.Therefore Imax and Imin over any putative switching period are equal: Imax = Imin. Verification / Alternative check: Let the converter be replaced by a DC source V_in. The R–L–E circuit reaches a DC current set by (V_in − E)/R with only an exponential transient, not a periodic ripple. Why Other Options Are Wrong: (b) Implies ripple—contradicted by a = 1. (c) and (d) discuss sign; the sign depends on V_in and E and is not the point asked. (e) Discontinuity cannot occur when the switch is always ON with an inductor in series. Common Pitfalls: Assuming ripple exists for any duty ratio; at a = 0 or a = 1 ideal ripple is zero. Final Answer: Imax = Imin (no ripple)

Question 7

Discontinuous current in a DC chopper with an R–L–E load Under which condition is the inductor current most likely to become discontinuous?

Accepted Answer

Introduction / Context: Current continuity in choppers depends on how long the inductor sees a positive or negative voltage each cycle. If during part of the cycle the inductor voltage drives current toward zero long enough, the current can reach zero, leading to discontinuous conduction mode (DCM). Given Data / Assumptions: Buck-type chopper feeding R–L–E load. Ideal components for conceptual reasoning. Concept / Approach: Low duty ratio means the switch is ON for a short time and OFF for a long time. During OFF time, the inductor current freewheels and decays (especially if E opposes current). If the OFF interval is sufficiently long, the current can fall to zero before the next ON interval, causing DCM. Step-by-Step Solution: When a is low, average inductor voltage is small.The prolonged OFF-time lets i(t) decay exponentially via the freewheel path.If decay reaches zero before the next ON, conduction becomes discontinuous. Verification / Alternative check: Time-constant analysis: with small a, OFF interval dominates. For modest L and non-negligible R or opposing E, i(t) may hit zero within one period. Why Other Options Are Wrong: (a) High L resists current change and favors continuous conduction. (c) High E can contribute to decay but DCM is most predictably caused by insufficient ON-time—hence (b) is the primary condition. (d) Incorrect because (b) is valid. (e) Low R leads to slower decay, favoring CCM. Common Pitfalls: Confusing the roles of L and R; large L supports continuity, large R speeds decay. Final Answer: Duty ratio a is low

Question 8

Cycloconverter operation in power electronics In a cycloconverter (direct AC–AC frequency converter), which quantities can be varied by control: output voltage, output frequency, or both simultaneously?

Accepted Answer

Introduction / Context: Cycloconverters are line-commutated AC–AC converters that synthesize a low-frequency output directly from a higher-frequency AC source by phase-controlling groups of thyristors. This question checks whether both the output voltage and the output frequency are independently controllable through firing-angle modulation. Given Data / Assumptions: Input is a fixed-frequency AC supply. Output needed is a variable, typically lower, frequency AC. Converter uses controlled devices (thyristors) in positive and negative groups. Concept / Approach: The output frequency is set by the template (reference) waveform used to modulate which device group conducts during each portion of the cycle. The output voltage (RMS or fundamental magnitude) is controlled by the firing angle within each synthesized half-cycle. Thus, the controller can regulate both voltage and frequency together to meet load requirements (e.g., large synchronous motor drives). Step-by-Step Solution: Use gating sequence to choose which group (positive/negative) fires → determines instantaneous polarity and reconstructed frequency.Adjust firing angle within each segment → controls output voltage magnitude (fundamental).Therefore, both voltage and frequency are adjustable at the same time. Verification / Alternative check: Industrial cycloconverter drives for low-speed, high-torque mills vary both speed (frequency) and torque (voltage) continuously. Why Other Options Are Wrong: Restricting control to only voltage or only frequency ignores the independent knobs available in phase control; “not simultaneously” is incorrect because both are coordinated in practice. Common Pitfalls: Confusing cycloconverters with simple AC regulators that only change RMS voltage at fixed frequency. Final Answer: both output voltage and output frequency simultaneously

Question 9

Single-phase full-bridge inverter for an R–L load For a single-phase full-bridge inverter feeding an R–L (inductive) load, what is the minimum practical device set required to ensure proper current paths?

Accepted Answer

Introduction / Context: An H-bridge inverter must provide paths for inductive load current during both active switching and freewheeling intervals. This question checks familiarity with antiparallel diodes (commonly called feedback or freewheel diodes) required with thyristor or transistor switches when supplying R–L loads. Given Data / Assumptions: Topology: single-phase full-bridge (H-bridge). Load is inductive; current cannot change instantaneously. Switch technology: thyristors (SCRs) without inherent body diodes. Concept / Approach: When one diagonal pair of SCRs turns off or the applied voltage reverses, the inductor forces current to continue. Without a diode path antiparallel to each controlled device, dangerous overvoltage can occur. Therefore, each of the four SCRs needs a diode in antiparallel to carry reactive current and provide safe commutation/freewheeling paths. Step-by-Step Solution: Identify 4 controlled devices (two legs, upper and lower each).Place 1 diode antiparallel to each device → 4 diodes total.Total device set: 4 thyristors + 4 diodes. Verification / Alternative check: Equivalent IGBT/MOSFET implementations use intrinsic/body diodes for the same function, confirming the need for antiparallel conduction. Why Other Options Are Wrong: Using no diodes or only two diodes leaves incomplete current paths; eight thyristors is unnecessary and costly for a single-phase bridge. Common Pitfalls: Assuming resistive-load rules apply to inductive loads; forgetting that SCRs do not conduct reverse current without diodes. Final Answer: 4 thyristors and 4 diodes

Question 10

Fundamental RMS of a full-bridge square-wave inverter A full-bridge inverter is fed by a DC battery of voltage V (producing a square-wave output of +V and −V). What is the RMS value of the fundamental component of the output voltage?

Accepted Answer

Introduction / Context: Square-wave inverters produce rich harmonic spectra. Designers often need the magnitude of the fundamental component for calculating output RMS, filter design, and machine voltage rating. This question asks for the RMS of the fundamental of an ideal H-bridge square wave with amplitude ±V. Given Data / Assumptions: Ideal full-bridge; no dead-time or device drops. Square-wave output swings between +V and −V. We need only the fundamental (first harmonic) RMS value. Concept / Approach: The Fourier series of a bipolar square wave of amplitude ±V has a fundamental (first harmonic) peak value given by V1,peak = 4V/π. The corresponding RMS of the fundamental is V1,rms = V1,peak/√2 = 4V/(π√2). This is lower than the total square-wave RMS (which equals V), because higher-order harmonics carry the remaining energy. Step-by-Step Solution: Square wave ±V → fundamental peak = 4V/π.Convert to RMS: V1,rms = (4V/π) / √2.Therefore, V1,rms = 4V/(π√2). Verification / Alternative check: Alternatively compute total RMS of square wave (V) and note that harmonics are present; only the fundamental portion is 0.9003… of V for bipolar modulation (since 4/(π√2) ≈ 0.9003). Why Other Options Are Wrong: 2V/π is average of a half-sine; V/√2 is the RMS of a sine with peak V, not 4V/π; 2V/√2 and 4V/π are not RMS of the fundamental for this waveform. Common Pitfalls: Confusing total RMS with the fundamental RMS; forgetting to divide the peak by √2. Final Answer: 4V/(π√2)

Question 11

Gate pulse width in a single-phase full-wave AC regulator For a single-phase full-wave regulator feeding an R–L load, are short gate pulses suitable for reliable control?

Accepted Answer

Introduction / Context: AC voltage controllers (AC regulators) use phase control of thyristors to vary RMS output. With inductive loads, current and voltage are out of phase, which affects latching and holding of SCRs. This question concerns the adequacy of short gate pulses when driving an R–L load. Given Data / Assumptions: Single-phase full-wave regulator (antiparallel SCRs). Load has significant inductance. Gate pulses can be short or of adequate width (e.g., train or long pulses). Concept / Approach: For inductive loads, at the instant of triggering, the anode current may lag and may not immediately exceed the SCR latching current if the gate pulse is too short. A long gate pulse (or multiple pulses) ensures the device turns on firmly once the load current reaches latching/holding levels despite phase lag and source impedance. Therefore, short single pulses are generally unsuitable. Step-by-Step Solution: Recognize that R–L loads cause delayed current rise.Short gate pulse may finish before current exceeds latching current.Use longer or train pulses to guarantee turn-on and avoid misfiring. Verification / Alternative check: Oscilloscope traces in application notes show missed firings with narrow pulses on inductive loads; long pulses resolve this. Why Other Options Are Wrong: “True” contradicts standard practice; conditions like “only at small α” or “only resistive load” add constraints not given and are not generally reliable for inductive cases. Common Pitfalls: Assuming gate triggering is identical for R and R–L loads; overlooking latching/holding current requirements. Final Answer: False

Question 12

Assertion–Reason on inverter commutation and operating modes Assertion (A): The McMurray–Bedford half-bridge inverter uses complementary commutation. Reason (R): A three-phase inverter can have two modes of operation.

Accepted Answer

Introduction / Context: Assertion–Reason questions test conceptual links. The McMurray–Bedford inverter family uses auxiliary components for forced commutation, and three-phase inverters can operate in different conduction modes (e.g., 120° and 180°). We must judge correctness and explanatory linkage. Given Data / Assumptions: McMurray–Bedford half-bridge: a classic forced-commutated thyristor inverter. Three-phase inverter modes: 120° (two devices on) and 180° (three devices on). Concept / Approach: Assertion: True. The McMurray–Bedford topology employs complementary (auxiliary) commutation where charged capacitors and coupling inductors transfer current and reverse-bias a conducting SCR to turn it off. Reason: True. Three-phase inverters indeed have different conduction schemes (operating modes). However, the reason does not logically explain why the McMurray–Bedford inverter uses complementary commutation; they are separate facts. Step-by-Step Solution: Confirm A (complementary commutation) → correct.Confirm R (two common conduction modes) → correct.Check causality: R does not explain A → choose “Both true, but R not the explanation.” Verification / Alternative check: Topology descriptions and timing diagrams show auxiliary commutation pairs in McMurray–Bedford and separate discussion for 120° vs 180° conduction in bridge inverters. Why Other Options Are Wrong: Options claiming wrong statements or causal linkage are inconsistent with standard inverter theory. Common Pitfalls: Assuming any true statement about inverters automatically explains another; causality must be explicit. Final Answer: Both A and R correct but R is not correct explanation of A

Question 13

Semiconverter with freewheeling diode (R–L–E load) A single-phase semiconverter supplies an R–L–E load and includes a freewheeling diode across the load. If the firing angle is α, the freewheeling diode conducts for how long?

Accepted Answer

Introduction / Context: Semiconverters (half-controlled bridges) with a freewheeling diode are widely used in DC motor drives. The freewheel interval is critical for current continuity and ripple. This question asks for the freewheel conduction duration as a function of firing angle α. Given Data / Assumptions: Single-phase semiconverter, R–L–E load. Freewheeling diode placed across the load. Continuous or quasi-continuous current; ideal devices and negligible overlap. Concept / Approach: During a positive half-cycle, the controlled SCR conducts from ωt = α to ωt = π. At ωt = π, the supply reverses polarity; the freewheeling diode takes over to keep current flowing, typically from ωt = π to ωt = 2π. The same pattern repeats each mains cycle. Thus, the freewheel interval per full cycle equals (π − α) (in radians) or (π − α)° when expressed in degrees. Step-by-Step Solution: SCR conduction in each positive half: from α to π → duration (π − α).Freewheel from π to 2π → duration π in that half-cycle pair, but attributable per cycle as (π − α) when accounting for controlled versus freewheel segments.Hence, freewheeling diode conducts for (π − α) per full cycle in the standard semiconverter sequence. Verification / Alternative check: Waveforms in classic drive texts show the freewheel diode conduction increasing as α decreases, matching (π − α) dependence. Why Other Options Are Wrong: “α° in each half” and “α° in one full cycle” reverse the dependence; “(π + α)” is non-physical; “π° in each half-cycle” overestimates and ignores α. Common Pitfalls: Mixing half-cycle and full-cycle accounting; forgetting that the freewheel path dominates after mains zero-crossing. Final Answer: (π − α)° in each cycle

Question 14

Chopper commutation using a saturable reactor Which chopper circuit classically employs a saturable reactor for commutation?

Accepted Answer

Introduction / Context: Different chopper commutation schemes use various reactive elements and auxiliary switches. Recognizing hallmark components (like saturable reactors) helps identify the chopper type quickly in exams and practice. Given Data / Assumptions: Focus is on classical named chopper topologies. Device technology is thyristor-based (historical context). Concept / Approach: The Morgan chopper employs a saturable reactor (magnetic switch) and a commutating capacitor to achieve turn-off of the main thyristor by generating a reverse current/voltage. Jones chopper, by contrast, uses a resonant LC and an auxiliary thyristor without the saturable-core element. Load-commutated schemes depend on the load EMF for commutation, not a saturable element. Step-by-Step Solution: Identify topology signature: saturable reactor → Morgan chopper.Exclude Jones (no saturable core) and load commutated (uses back EMF).Conclude Morgan chopper is correct. Verification / Alternative check: Topology diagrams in textbooks label the saturable reactor explicitly in Morgan circuits. Why Other Options Are Wrong: Auxiliary and Jones choppers rely on LC resonance and auxiliary SCR, not saturable cores; load commutated depends on the load. Common Pitfalls: Confusing Morgan with magnetic amplifier concepts or assuming all auxiliary-commutated choppers use saturable reactors. Final Answer: Morgan chopper

Question 15

Matched TRIAC–DIAC pair for lamp dimmers For an illumination (light dimmer) control circuit using a TRIAC trigger, is it advisable to use a matched TRIAC–DIAC pair?

Accepted Answer

Introduction / Context: Phase-control lamp dimmers commonly use a DIAC to trigger a TRIAC symmetrically on positive and negative half cycles. Matching the devices improves symmetry and jitter performance. This question asks whether such matching is advisable. Given Data / Assumptions: AC mains phase-control application. TRIAC as the main bidirectional switch. DIAC as a symmetrical trigger device. Concept / Approach: A matched TRIAC–DIAC pair ensures similar breakover characteristics across polarities, reducing waveform asymmetry, audible hum, and flicker. It enhances repeatability of the firing angle and reduces harmonics due to unequal conduction in alternate half-cycles, especially important with sensitive lamps and dimming requirements. Step-by-Step Solution: Recognize that DIAC threshold variation affects TRIAC gating delay.Matched pair → consistent threshold in both polarities → smoother dimming.Therefore, using a matched pair is advisable. Verification / Alternative check: Manufacturer application notes often specify recommended DIAC/TRIAC combinations for best symmetry. Why Other Options Are Wrong: The advice is not limited to high frequency or inductive loads; heat sinking does not address firing symmetry. Common Pitfalls: Assuming any DIAC will do; tolerances can create visible flicker at certain dim levels. Final Answer: True

Question 16

Current in commutating elements of a series inverter In a classic series (resonant) inverter topology, how do the commutating elements (L and C) relate to load current?

Accepted Answer

Introduction / Context: In a series inverter, the commutating components (inductor and capacitor) are placed in series with the load, forming a resonant path used for both output generation and thyristor commutation. Understanding current paths is essential for component current ratings and losses. Given Data / Assumptions: Series inverter with L, C, and load all in series. Thyristor switching excites the series LC resonance. Sinusoidal current pulses shape output voltage across the load. Concept / Approach: Because L and C are in series with the load, the same current flows through all series elements at each instant. Therefore, commutating components must be rated for the full load current (including peak resonant current), not a fraction of it. This is a key difference from parallel-type commutated inverters, where commutation elements may not carry full load current continuously. Step-by-Step Solution: Draw equivalent: source → SCR → L → C → load in series.Apply series-circuit rule: current is identical through all series components.Conclude: L and C carry full load/resonant current. Verification / Alternative check: Waveforms show identical current through L, C, and load; voltages redistribute but current is common. Why Other Options Are Wrong: Options suggesting partial current or no current contradict the series nature; “any of the above” is incorrect for the classical series inverter. Common Pitfalls: Confusing series with parallel commutation topologies. Final Answer: the commutating elements carry full load current

Question 17

Design condition for a UJT relaxation oscillator When using a UJT as a relaxation oscillator, what should the source/emitter current condition be for stable oscillation?

Accepted Answer

Introduction / Context: A UJT relaxation oscillator charges a capacitor through a resistor until the UJT reaches its peak-point condition, then rapidly discharges until the current falls below the valley current. Proper resistor choice ensures reliable turn-on and turn-off each cycle. This question asks for the correct current condition relative to the peak current Ip and the valley current Iv. Given Data / Assumptions: UJT parameters: peak current Ip (turn-on threshold) and valley current Iv (turn-off threshold). Capacitor charges via a resistor from a DC supply. Oscillation requires periodic triggering and quenching. Concept / Approach: To trigger, the emitter current at the instant the capacitor reaches the peak-point voltage must exceed Ip so the UJT switches on and discharges the capacitor. For oscillation to stop and allow the next cycle, the current through the UJT path after discharge must fall below Iv so the device turns off. Therefore, the design aims for source/emitter current capability that is greater than Ip at firing but less than Iv once the capacitor has discharged and emitter voltage collapses. Step-by-Step Solution: Choose R so that initial charging allows eventual Ie ≥ Ip at Vp → device turns on.After discharge, ensure steady current through R is < Iv → device turns off.Net condition: more than Ip but less than Iv (considering the two operating instants). Verification / Alternative check: Application notes specify R selection so that VBB/R < Iv (turn-off ensured) and timing ensures Ip is surpassed at V = Vp (turn-on ensured). Why Other Options Are Wrong: “Less than Ip” prevents turn-on; “more than Iv” risks latch-on preventing oscillation; negative current is non-physical in the standard biasing. Common Pitfalls: Confusing instantaneous current at firing with steady bias current; ignoring Iv requirement. Final Answer: more than Ip but less than Iv

Question 18

Series connection of two single-phase semi-converters (series converter) The input voltage is v = Vm sin(ωt). Two single-phase semi-converters are connected in series, with firing angles a1 and a2. If the first converter is fired at a1 = 0, determin…

Accepted Answer

Introduction / Context: Series connection of semi-converters is a standard way to increase the controllable DC voltage. Each single-phase semi-converter produces an average voltage proportional to (1 + cos α), multiplied by Vm/π. When cascaded in series, the total average is the sum of individual averages (assuming identical input and continuous conduction). Given Data / Assumptions: Two single-phase semi-converters in series. Input: v = Vm sin(ωt). Firing angles are a1 and a2; here a1 = 0. Resistive or continuous-current operation so standard average formulas apply. Concept / Approach: The average DC output of one semi-converter is Vdc1 = (Vm/π) * (1 + cos a1). For two in series, Vdc_total = (Vm/π) * [(1 + cos a1) + (1 + cos a2)]. Substitute a1 = 0 to obtain a compact expression in terms of a2 only. Step-by-Step Solution: For converter 1: Vdc1 = (Vm/π) * (1 + cos 0) = (Vm/π) * (1 + 1) = (Vm/π) * 2.For converter 2: Vdc2 = (Vm/π) * (1 + cos a2).Total: Vdc_total = (Vm/π) * (2 + 1 + cos a2 − 1) = (Vm/π) * (3 + cos a2). Verification / Alternative check: If a2 = 0 as well, total would be (Vm/π) * (4), consistent with both units firing at zero angle (maximum average). Why Other Options Are Wrong: (1 + cos a2), (2 + cos a2), (4 + cos a2): do not correctly account for a1 = 0, which contributes +1 to the sum (becoming +2) and adds to the other converter’s 1 + cos a2, yielding 3 + cos a2. Common Pitfalls: Forgetting that each semi-converter yields (1 + cos α) and that series connection sums averages directly; omitting the constant from a1 = 0. Final Answer: (3 + cos a2)

Question 19

Device identification If two silicon unilateral switches (SUS) are connected in anti-parallel, which device is effectively realized?

Accepted Answer

Introduction / Context: Some solid-state trigger devices are constructed by combining simpler building blocks. A silicon bilateral switch (SBS) can be formed conceptually by arranging two silicon unilateral switches (SUS) in anti-parallel, giving symmetrical conduction characteristics for positive and negative polarities, useful in AC triggering (e.g., TRIAC gate drive). Given Data / Assumptions: Two SUS devices are connected in anti-parallel. Goal: identify the resulting effective device behavior. Concept / Approach: A SUS is a unilateral device—it breaks over and conducts in one polarity only. Anti-parallel connection provides similar breakover behavior in both polarities, creating bilateral symmetry in I–V characteristics, which is the hallmark of an SBS. Step-by-Step Solution: Recognize unilateral vs bilateral behavior: SUS → unilateral.Anti-parallel connection supplies mirror behavior in the opposite polarity.Resulting composite is a bilateral switching element → SBS. Verification / Alternative check: Data sheets for SBS devices highlight symmetrical breakover voltage and conduction in both polarities, aligning with anti-parallel SUS behavior. Why Other Options Are Wrong: SCR: four-layer pnpn unilateral controlled rectifier, not achieved by simply anti-paralleling SUS. SCS: a gated variant of SCR; unrelated to bilateral symmetry here. UJT: a unijunction trigger device; does not result from anti-paralleling two SUS. Common Pitfalls: Confusing bilateral switching devices (SBS, TRIAC) with controlled rectifiers (SCR) that are inherently unilateral. Final Answer: SBS (silicon bilateral switch)

Question 20

UJT trigger waveform for thyristor firing When a unijunction transistor (UJT) is used as a relaxation oscillator to generate thyristor gate signals, what is the principal waveform produced across the timing capacitor?

Accepted Answer

Introduction / Context: A UJT relaxation oscillator is a classic method to produce periodic firing pulses for SCRs and TRIACs. The waveform across the timing capacitor determines pulse timing and linearity for phase control circuits used in AC voltage regulators and controlled rectifiers. Given Data / Assumptions: UJT configured as a relaxation oscillator with an RC timing network. Device used to provide periodic gate triggers. Concept / Approach: In a UJT relaxation oscillator, the capacitor charges exponentially toward the supply through a resistor until reaching the UJT’s peak point voltage (η·VBB approximately). At this instant, the UJT conducts sharply, discharging the capacitor rapidly toward the valley point, after which the cycle repeats. The capacitor voltage therefore ramps up (approximately exponential but often treated as a ramp) and then falls quickly, producing a sawtooth-like waveform. Step-by-Step Solution: Capacitor charges through R toward VBB → slow rise.At V = Vp (peak point) → UJT fires → rapid discharge to near valley voltage.Cycle repeats → sawtooth waveform across capacitor; narrow pulses appear across the UJT emitter circuit for triggering. Verification / Alternative check: Oscilloscope traces in standard UJT oscillator circuits show a rising ramp followed by a sharp fall, i.e., a sawtooth across the capacitor, and narrow trigger pulses at the UJT emitter resistor. Why Other Options Are Wrong: Sine/square: not generated by the UJT RC relaxation process. “Either”: depends on circuit; the canonical UJT oscillator produces a sawtooth across C. Common Pitfalls: Confusing the sawtooth on the capacitor with the narrow gate trigger pulses delivered to the thyristor gate through a coupling network. Final Answer: Sawtooth wave

Power Electronics Questions