Q: For 12-pulse rectifier operation, which transformer connections are used to feed the two 6-pulse bridges to obtain the required 30° phase shift?

Introduction / Context: To reduce ripple and harmonic content, high-power converters often use 12-pulse rectification, realized by paralleling or series-connecting two 6-pulse bridges fed from secondaries with a 30° phase displacement. The transformer vector group choice is crucial to create this displacement. Given Data / Assumptions: Two 6-pulse bridges require a 30° phase shift between their AC inputs. Standard transformer connections provide known phase shifts (e.g., Y-Δ provides 30°). Equal voltage magnitudes are assumed for proper current sharing/harmonic cancellation. Concept / Approach: A Y-Y secondary provides a 0° reference, while a Y-Δ secondary provides a ±30° phase shift. Feeding separate 6-pulse bridges from these secondaries yields outputs that, when combined, form a 12-pulse system with reduced characteristic harmonics and improved DC quality. Step-by-Step Reasoning: Select one secondary with 0° phase shift: Y-Y.Select the other with 30° displacement: Y-Δ.Feed each 6-pulse bridge separately; combine outputs to realize 12-pulse performance. Verification / Alternative check: Harmonic cancellation rule: 12-pulse cancels 5th and 7th line currents when the secondaries are displaced by 30°. Y-Y and Y-Δ is a textbook solution to achieve this. Why Other Options Are Wrong: Y-Y & Y-Y or Δ-Δ & Δ-Δ: zero relative displacement, no 12-pulse harmonic benefits. Y-Δ & Y-Δ: both displaced but equal; no 30° difference between the two feeds. Δ combinations without a complementary 0° feed do not provide the needed relative 30° shift. Common Pitfalls: Confusing absolute phase shift with relative shift between the two bridges. Ignoring vector group standard phase relationships. Final Answer: Y - Y and Y - Δ transformers

Q: In a step-down chopper using PWM, Ton = 3 × 10^-3 s and Toff = 1 × 10^-3 s. What is the chopping frequency?

Introduction / Context: Choppers convert a fixed DC input to a variable DC output by high-frequency switching. The chopping frequency is the reciprocal of the switching period, important for sizing filters and estimating ripple and switching losses. Given Data / Assumptions: On-time Ton = 3 × 10^-3 s. Off-time Toff = 1 × 10^-3 s. PWM operation with period T = Ton + Toff. Units for the final numeric answer are in hertz (Hz) though the options are shown without units. Concept / Approach: Chopping frequency f is defined as f = 1 / T, where T is the total switching period. Duty ratio D = Ton / T is not directly needed here but could be used to confirm operating point and average output voltage for a step-down chopper: Vout ≈ D * Vin (ideal case). Step-by-Step Solution: Compute T = Ton + Toff = 3e-3 + 1e-3 = 4e-3 s.Compute f = 1 / T = 1 / (4e-3) = 250 Hz.Thus, the chopping frequency is 250 Hz. Verification / Alternative check: If the chopper turns on for 3 ms and off for 1 ms, four such milliseconds complete one full cycle, so there are 250 cycles in one second, confirming 250 Hz. Why Other Options Are Wrong: 333.33: corresponds to 3 ms period, not 4 ms. 500 or 1000: would require 2 ms or 1 ms total period respectively, not given here. 125: would require 8 ms period, not applicable. Common Pitfalls: Adding Ton and Toff incorrectly or confusing duty with frequency. Forgetting that frequency is the reciprocal of total period, not of Ton alone. Final Answer: 250

Q: A two-winding transformer feeds a single-phase half-wave controlled rectifier with a purely resistive load. If the transformer secondary rms current is Is and the load rms current is Irms, what is their relationship?

Introduction / Context: In single-phase half-wave rectifiers with resistive loads, the secondary winding current and the load current flow through the same path when the diode or thyristor conducts. Understanding whether their rms values match helps with transformer current rating and heating calculations. Given Data / Assumptions: Half-wave controlled rectifier (one controlled device), resistive load. Same current flows through the secondary and the load during conduction intervals. During non-conduction, current is zero in both secondary and load. We consider rms over a full cycle. Concept / Approach: For a resistive load, instantaneous current i(t) = v_sec(t)/R during conduction, and 0 otherwise. The transformer secondary current and the load current waveforms are identical in time because the secondary is in series with the load during conduction. Therefore, their rms values over a cycle are the same, regardless of firing angle that merely shifts the conduction start time and duration. Step-by-Step Reasoning: When device conducts: i_secondary(t) = i_load(t).When device is off: i_secondary(t) = i_load(t) = 0.Identical waveforms imply identical rms values: Is = Irms. Verification / Alternative check: Compute rms by integrating i^2(t) over one period for either waveform; since the waveforms coincide sample by sample, the rms values must be equal for any firing angle. Why Other Options Are Wrong: 0.5 * Irms or conditional equality at 30°: not supported by waveform identity. √2 factor: relates sinusoidal peak to rms, not secondary versus load rms equality here. Common Pitfalls: Confusing average current equality with rms; here both are equal because the waveforms are identical. Assuming the transformer sees a different duty than the load; it does not in this half-wave, resistive case. Final Answer: Is = Irms irrespective of the firing angle

Q: Assertion–Reason on switching speed: Assertion (A) Power transistors have lower switching time than SCRs. Reason (R) Power transistors have greater switching time than SCRs.

Introduction / Context: Switching speed determines the feasible operating frequency and losses in power converters. Comparing devices is common in selecting semiconductors for choppers and inverters. Given Data / Assumptions: Power transistors (BJTs, MOSFETs, IGBTs) versus SCRs (thyristors). General, typical device behavior is intended, not niche specialty parts. Switching time includes turn-on and turn-off transitions. Concept / Approach: SCRs are latching devices with relatively long turn-off (device recovery) times and require current to be forced below holding current. Power transistors are minority/majority carrier devices designed for faster switching. Thus, power transistors typically switch significantly faster than SCRs, enabling higher switching frequencies. Step-by-Step Evaluation: Check A: True. Power transistors are used for higher frequency switching than SCRs.Check R: False. It contradicts the known relative speeds by claiming transistors have greater switching time.Conclusion: A is correct but R is wrong. Verification / Alternative check: Application practice: SCR choppers and inverters are limited to comparatively low frequencies, while MOSFETs and IGBTs operate efficiently at tens of kHz and beyond, reflecting faster switching dynamics. Why Other Options Are Wrong: Any option treating R as correct is inconsistent with established device behavior. Declaring both wrong would dismiss the accurate assertion about relative speed. Common Pitfalls: Confusing di/dt and dv/dt limits with switching time; they are related but not identical metrics. Overlooking that some specialized inverter-grade SCRs are faster but still not as fast as modern transistors for high-frequency PWM. Final Answer: A is correct but R is wrong

Q: For a single-phase full-wave controlled rectifier (M-2 connection) feeding an R–L load with input v(t) = Vm sin(ωt), what is the expression for the average (dc) output voltage Vdc under continuous current?

Introduction / Context: The average output voltage of a phase-controlled rectifier depends on the firing angle α and the rectifier topology. For a full-wave controlled rectifier using a center-tapped transformer (M-2), a standard closed-form expression exists when current is continuous through the R–L load. Given Data / Assumptions: Single-phase full-wave controlled rectifier (M-2). Input v(t) = Vm sin(ωt). Load is R–L with continuous current (no extinction within the cycle). Firing angle α in the usual 0 to π range. Concept / Approach: For continuous current, each half-cycle contributes an identical controlled conduction segment. The average voltage over one electrical period can be integrated from α to π for each half, producing a well-known result. The total average over the full cycle yields a term proportional to (1 + cos α). Step-by-Step Solution: For one half-cycle: v_o = Vm sin θ from θ = α to θ = π.Average over full cycle uses symmetry of two halves.Compute Vdc = (1/π) * ∫(α to π) Vm sin θ dθ + (1/π) * ∫(π+α to 2π) Vm sin θ dθ.Each integral gives Vm/π * (1 + cos α) / 2; combined over both halves yields Vdc = (Vm/π) * (1 + cos α). Verification / Alternative check: At α = 0, Vdc = 2Vm/π which matches the diode full-wave average. As α increases to π, Vdc approaches 0, consistent with physical expectation. Why Other Options Are Wrong: (Vm/2π)(1+cos α): half-wave result, not full-wave. (2Vm/π) cos α or (Vm/π) cos α: apply to certain bridge forms or different derivations; they do not match the M-2 continuous current case with the 1 + cos α term. (Vm/2)(1+cos α): wrong scaling and units. Common Pitfalls: Using diode rectifier averages for controlled rectifiers without including α. Confusing M-2 with B-2 formulas; topology matters for prefactors. Final Answer: Vdc = (Vm / π) * (1 + cos α)

Q: An SCR conducts in the positive half-cycle only. If it is fired at α = 40° and the average anode current is 50 A, what will happen to the average current when the firing angle is changed to α = 80° (same conditions)?

Introduction / Context: In a half-wave controlled rectifier with a resistive load, the average output (and hence average current at fixed load resistance) depends on the firing angle α through the term (1 + cos α). Increasing α delays conduction and lowers the average value. This question examines how much it drops when α is increased from 40° to 80°. Given Data / Assumptions: Half-wave controlled rectifier, conduction in the positive half only. Average current at α = 40° is 50 A. Load and supply remain the same; proportionality to (1 + cos α) holds. Resistive behavior so Idc ∝ Vdc. Concept / Approach: For a half-wave controlled rectifier: Vdc ∝ (1 + cos α). So the ratio of average currents equals the ratio of (1 + cos α) values for the two firing angles. Compute this ratio and scale the known current to estimate the new average current at α = 80°. Step-by-Step Solution: At α1 = 40°: factor1 = 1 + cos 40° ≈ 1 + 0.7660 = 1.7660.At α2 = 80°: factor2 = 1 + cos 80° ≈ 1 + 0.1736 = 1.1736.Current ratio = factor2 / factor1 ≈ 1.1736 / 1.7660 ≈ 0.6645.New average current ≈ 50 A * 0.6645 ≈ 33.2 A. Verification / Alternative check: As α increases, conduction window shrinks, so current must drop. A value between 25 A and 50 A fits physical expectations and the computed ratio. Why Other Options Are Wrong: 50 A: implies no change with α, incorrect. 25 A or less than 25 A: too low; would require a much larger α or different load. More than 50 A: contradicts the monotonic decrease of (1 + cos α) with α in 0 to 180°. Common Pitfalls: Using Vdc ∝ cos α (full-wave bridge intuition) instead of the half-wave form. Forgetting to compute the ratio rather than absolute values. Final Answer: less than 50 A but more than 25 A

Q: Assertion–Reason (SCR ratings): The surge current that a silicon-controlled rectifier (SCR) can withstand is much higher than its RMS on-state current; this is because the surge duration is very short. Evaluate the statements.

Introduction / Context: This item tests understanding of surge (non-repetitive) current capability of an SCR versus its continuous or RMS on-state current rating, and why data sheets allow a much higher one-cycle or few-cycle surge. Surge ratings are fundamental in power electronics for inrush and short-duration fault scenarios. Given Data / Assumptions: Device: SCR operating within manufacturer limits. Comparison: non-repetitive surge current vs RMS on-state current. Surge is of very short duration (typically one mains cycle or a few milliseconds). Concept / Approach: Semiconductor thermal mass and junction-to-case thermal impedance allow a brief energy pulse without exceeding maximum junction temperature. Hence, I_surge may be several times I_T(RMS). Since surge lasts a short time, average heating is limited even though instantaneous current is high. Step-by-Step Solution: Statement A: 'Surge current is much higher than RMS on-state current' → True; typical data sheets show 8–10× or more for one-cycle surge.Statement R: 'Duration of surge current is very small' → True; allowed only for short, non-repetitive intervals.Causality: Short duration limits junction temperature rise, explaining why larger current is permissible briefly → R explains A. Verification / Alternative check: Thermal equation: ΔT ≈ (∫i^2(t) dt) * R_th(j-x) / k; small time window keeps ΔT within safe bounds. Why Other Options Are Wrong: If R did not mention short duration, A would lack justification; here R directly explains A. Common Pitfalls: Confusing surge (non-repetitive) with repetitive overcurrent; ignoring thermal time constants and safe operating area. Final Answer: Both A and R are correct and R is correct explanation of A

Q: Single-phase half-wave controlled rectifier with free-wheeling diode (R–L load): for firing angle α, identify the conduction intervals of the SCR and the free-wheeling diode over one cycle.

Introduction / Context: This question examines current continuity and commutation in a half-wave controlled rectifier feeding an R–L load with a free-wheeling diode (FWD). Understanding when the SCR and the diode conduct is essential for predicting output voltage and current waveforms. Given Data / Assumptions: Source: single-phase sine voltage. Converter: half-wave controlled rectifier (one SCR) with a free-wheeling diode across the load. Load: R–L (inductive) so current tends to continue when source reverses. Firing angle: α in each positive half-cycle. Concept / Approach: During the positive half-cycle, after firing at ωt = α, the SCR conducts until the source crosses zero at ωt = π. When the source becomes negative (ωt > π), the inductor tries to keep current flowing; the FWD provides a path, clamping load voltage near zero and preventing negative current through the SCR. Thus, the diode conducts from π to 2π (until the source becomes positive again and the next firing occurs). Step-by-Step Solution: SCR interval: from ωt = α (trigger) to ωt = π (natural commutation at zero crossing).FWD interval: from ωt = π to ωt = 2π (freewheeling during negative half-cycle).Therefore: SCR → α < ωt < π; FWD → π < ωt < 2π. Verification / Alternative check: Waveforms show load voltage equals source during SCR conduction and near zero during freewheeling; load current is continuous if L is adequate. Why Other Options Are Wrong: Extending beyond 2π or trimming by α in the negative half-cycle is inconsistent with freewheeling action. Common Pitfalls: Forgetting that the FWD takes over at π; assuming SCR continues into negative half-cycle (it does not). Final Answer: α < ωt < π and π < ωt < 2π

Question 1

A non-linear resistor has the characteristic i = k * v^4. If the current i increases to 100 times its original value, by what factor does the voltage v change?

Accepted Answer

Introduction / Context: This question checks understanding of power law device characteristics and how input and output variables scale. Many non-linear components exhibit current that is a power function of voltage. Knowing how one variable scales when the other is multiplied is a key skill in electronics and circuit analysis. Given Data / Assumptions: The device obeys i = k * v^4, where k is a constant of proportionality. The current increases by a factor of 100 (i_new = 100 * i_old). We assume the same operating device and temperature, so k remains constant. Concept / Approach: If i ∝ v^n, then v ∝ i^(1/n). Here n = 4, so voltage scales with the fourth root of current. We translate the 100x increase in current into a voltage scaling using the inverse power 1/4. This method avoids needing the exact value of k or absolute voltages and currents. Step-by-Step Solution: Start: i_old = k * v_old^4.New current: i_new = 100 * i_old.Use law: i_new / i_old = (v_new / v_old)^4.Thus (v_new / v_old)^4 = 100.Take fourth root: v_new / v_old = 100^(1/4) = (10^2)^(1/4) = 10^(1/2) = √10 ≈ 3.162.Therefore, voltage increases by approximately 3.16 times, which is best described as about 3 times. Verification / Alternative check: Plug back: If v scales by 3.162, then v^4 scales by (3.162)^4 ≈ 100, matching the required current change. This confirms the reasoning without needing k. Why Other Options Are Wrong: about 10 times and about 100 times: imply v ∝ i or v ∝ i^something much larger; both contradict the fourth-power law. about twice or about √2 times: far too small; would yield current increases of 2^4 = 16 or (√2)^4 = 4, not 100. Common Pitfalls: Taking a square root instead of the fourth root because of confusion between exponent and root. Assuming linear proportionality, which would be incorrect for power-law devices. Final Answer: about 3 times

Question 2

How many external leads does a silicon controlled rectifier (SCR) have?

Accepted Answer

Introduction / Context: An SCR is a widely used thyristor in power electronics. Knowing its terminals is essential for proper triggering, protection, and connection in converters, inverters, and control circuits. Given Data / Assumptions: Device: SCR (silicon controlled rectifier). Standard construction and operation are assumed, without special integrated packages. Looking for the number of external connection leads. Concept / Approach: An SCR is a four-layer p-n-p-n controlled rectifier. It requires a control terminal to initiate conduction and two power terminals for current flow. Therefore, it has three external terminals: anode, cathode, and gate. The gate is used for triggering, while the anode and cathode carry the main current once the device latches on. Step-by-Step Solution: Identify main current path: between anode (A) and cathode (K).Identify control path: gate (G) relative to cathode used to inject current to trigger conduction.Total leads = A + K + G = 3. Verification / Alternative check: Datasheets and circuit symbols consistently show three terminals. Trigger circuits always reference gate to cathode, while the anode connects to the supply or load side depending on configuration (series or bridge). Why Other Options Are Wrong: 2 leads: corresponds to a diode, not a controlled rectifier. 4 or 5 leads: not standard for discrete SCRs; extra pins appear in modules but still map to A, K, G only. 1 lead: impossible for a controllable two-terminal power path. Common Pitfalls: Confusing SCRs with TRIACs (which still present three main connections in most symbols). Assuming internal sensors or extra auxiliary gates add terminals—these are not typical of standard SCRs. Final Answer: 3

Question 3

Evaluate the statement: Thyristors are not suitable for logic circuits.

Accepted Answer

Introduction / Context: Logic circuits require devices that switch very rapidly, consume minimal static power, and can be reset or toggled predictably by small signals. Thyristors, including SCRs, are latching power devices optimized for high current and voltage control, not for digital logic switching at low power levels. Given Data / Assumptions: Thyristor characteristics: latching behavior, needs current to fall below holding current to turn off. Logic circuit needs: fast switching, non-latching control, low drive and low power. Typical frequency and voltage levels of logic are far lower than power electronics levels. Concept / Approach: An SCR turns on with a gate trigger but turns off only when the anode current drops below the holding current. This inherent latching makes it unsuitable for general logic where devices must both turn on and off by gate or base control at will. Additionally, thyristors have relatively slow switching times compared with transistors and CMOS devices used in logic gates. Step-by-Step Reasoning: Logic requires strict control of both transitions using gate or base voltage signals.Thyristors do not turn off with the gate; they require current forced to zero (natural or forced commutation).Thyristors are designed for high power handling, not low-level, high-speed logic toggling. Verification / Alternative check: Digital electronics uses BJT, MOSFET, and CMOS devices in TTL/CMOS families. Thyristors are found in rectifiers, inverters, choppers, and motor drives, not in logic ICs. Why Other Options Are Wrong: False: contradicts the fundamental latching and slow turn-off characteristics. Depends on supply or temperature only: suitability is rooted in device physics, not just operating conditions. Only true at high frequency: even at low frequency, the inability to gate turn-off is a problem for logic. Common Pitfalls: Confusing TRIAC or SCR triggering with logic-level control capability. Assuming any three-terminal device is automatically logic-suitable. Final Answer: True

Question 4

Cycloconverter operation modes: can a cycloconverter perform step-down and/or step-up frequency conversion?

Accepted Answer

Introduction / Context: A cycloconverter directly converts AC at one frequency to AC at another frequency without an intermediate DC link, by controlling segments of the input waveforms. Understanding whether it can step frequency down or up is important in selecting drives for low-speed, high-power applications. Given Data / Assumptions: Consider conventional line-commutated cycloconverters used in industrial drives. They synthesize output by phase-controlling input segments from a fixed-frequency AC source. We are not considering special resonant or forced-commutated laboratory variants here. Concept / Approach: Practical cycloconverters in industry are step-down devices: the output frequency is a submultiple of the input, typically less than one-third of the supply frequency, to maintain acceptable waveform quality and commutation margin. Step-up operation is not used in standard line-commutated cycloconverters due to severe commutation and waveform quality limitations. Step-by-Step Reasoning: Cycloconverter output is assembled from input segments with controlled firing angles.Maintaining proper commutation requires sufficient time per half-cycle; higher output frequency reduces commutation windows.Therefore, standard cycloconverters are used as step-down frequency converters (f_out < f_in). Verification / Alternative check: Applications like large synchronous motor drives at low speeds use step-down cycloconverters from 50/60 Hz to a few Hz to tens of Hz. Step-up needs are served by other topologies (DC link converters, matrix converters with advanced commutation). Why Other Options Are Wrong: step up or step down: overstates capability for practical, line-commutated units. step up: contradicts common industrial practice and commutation constraints. none: incorrect because step-down is widely used. Common Pitfalls: Assuming any AC–AC converter can both step up and step down frequency. Confusing cycloconverters with matrix converters or indirect AC–DC–AC converters. Final Answer: step down

Question 5

For 12-pulse rectifier operation, which transformer connections are used to feed the two 6-pulse bridges to obtain the required 30° phase shift?

Accepted Answer

Introduction / Context: To reduce ripple and harmonic content, high-power converters often use 12-pulse rectification, realized by paralleling or series-connecting two 6-pulse bridges fed from secondaries with a 30° phase displacement. The transformer vector group choice is crucial to create this displacement. Given Data / Assumptions: Two 6-pulse bridges require a 30° phase shift between their AC inputs. Standard transformer connections provide known phase shifts (e.g., Y-Δ provides 30°). Equal voltage magnitudes are assumed for proper current sharing/harmonic cancellation. Concept / Approach: A Y-Y secondary provides a 0° reference, while a Y-Δ secondary provides a ±30° phase shift. Feeding separate 6-pulse bridges from these secondaries yields outputs that, when combined, form a 12-pulse system with reduced characteristic harmonics and improved DC quality. Step-by-Step Reasoning: Select one secondary with 0° phase shift: Y-Y.Select the other with 30° displacement: Y-Δ.Feed each 6-pulse bridge separately; combine outputs to realize 12-pulse performance. Verification / Alternative check: Harmonic cancellation rule: 12-pulse cancels 5th and 7th line currents when the secondaries are displaced by 30°. Y-Y and Y-Δ is a textbook solution to achieve this. Why Other Options Are Wrong: Y-Y & Y-Y or Δ-Δ & Δ-Δ: zero relative displacement, no 12-pulse harmonic benefits. Y-Δ & Y-Δ: both displaced but equal; no 30° difference between the two feeds. Δ combinations without a complementary 0° feed do not provide the needed relative 30° shift. Common Pitfalls: Confusing absolute phase shift with relative shift between the two bridges. Ignoring vector group standard phase relationships. Final Answer: Y - Y and Y - Δ transformers

Question 6

In a step-down chopper using PWM, Ton = 3 × 10^-3 s and Toff = 1 × 10^-3 s. What is the chopping frequency?

Accepted Answer

Introduction / Context: Choppers convert a fixed DC input to a variable DC output by high-frequency switching. The chopping frequency is the reciprocal of the switching period, important for sizing filters and estimating ripple and switching losses. Given Data / Assumptions: On-time Ton = 3 × 10^-3 s. Off-time Toff = 1 × 10^-3 s. PWM operation with period T = Ton + Toff. Units for the final numeric answer are in hertz (Hz) though the options are shown without units. Concept / Approach: Chopping frequency f is defined as f = 1 / T, where T is the total switching period. Duty ratio D = Ton / T is not directly needed here but could be used to confirm operating point and average output voltage for a step-down chopper: Vout ≈ D * Vin (ideal case). Step-by-Step Solution: Compute T = Ton + Toff = 3e-3 + 1e-3 = 4e-3 s.Compute f = 1 / T = 1 / (4e-3) = 250 Hz.Thus, the chopping frequency is 250 Hz. Verification / Alternative check: If the chopper turns on for 3 ms and off for 1 ms, four such milliseconds complete one full cycle, so there are 250 cycles in one second, confirming 250 Hz. Why Other Options Are Wrong: 333.33: corresponds to 3 ms period, not 4 ms. 500 or 1000: would require 2 ms or 1 ms total period respectively, not given here. 125: would require 8 ms period, not applicable. Common Pitfalls: Adding Ton and Toff incorrectly or confusing duty with frequency. Forgetting that frequency is the reciprocal of total period, not of Ton alone. Final Answer: 250

Question 7

A two-winding transformer feeds a single-phase half-wave controlled rectifier with a purely resistive load. If the transformer secondary rms current is Is and the load rms current is Irms, what is their relationship?

Accepted Answer

Introduction / Context: In single-phase half-wave rectifiers with resistive loads, the secondary winding current and the load current flow through the same path when the diode or thyristor conducts. Understanding whether their rms values match helps with transformer current rating and heating calculations. Given Data / Assumptions: Half-wave controlled rectifier (one controlled device), resistive load. Same current flows through the secondary and the load during conduction intervals. During non-conduction, current is zero in both secondary and load. We consider rms over a full cycle. Concept / Approach: For a resistive load, instantaneous current i(t) = v_sec(t)/R during conduction, and 0 otherwise. The transformer secondary current and the load current waveforms are identical in time because the secondary is in series with the load during conduction. Therefore, their rms values over a cycle are the same, regardless of firing angle that merely shifts the conduction start time and duration. Step-by-Step Reasoning: When device conducts: i_secondary(t) = i_load(t).When device is off: i_secondary(t) = i_load(t) = 0.Identical waveforms imply identical rms values: Is = Irms. Verification / Alternative check: Compute rms by integrating i^2(t) over one period for either waveform; since the waveforms coincide sample by sample, the rms values must be equal for any firing angle. Why Other Options Are Wrong: 0.5 * Irms or conditional equality at 30°: not supported by waveform identity. √2 factor: relates sinusoidal peak to rms, not secondary versus load rms equality here. Common Pitfalls: Confusing average current equality with rms; here both are equal because the waveforms are identical. Assuming the transformer sees a different duty than the load; it does not in this half-wave, resistive case. Final Answer: Is = Irms irrespective of the firing angle

Question 8

Assertion–Reason on switching speed: Assertion (A) Power transistors have lower switching time than SCRs. Reason (R) Power transistors have greater switching time than SCRs.

Accepted Answer

Introduction / Context: Switching speed determines the feasible operating frequency and losses in power converters. Comparing devices is common in selecting semiconductors for choppers and inverters. Given Data / Assumptions: Power transistors (BJTs, MOSFETs, IGBTs) versus SCRs (thyristors). General, typical device behavior is intended, not niche specialty parts. Switching time includes turn-on and turn-off transitions. Concept / Approach: SCRs are latching devices with relatively long turn-off (device recovery) times and require current to be forced below holding current. Power transistors are minority/majority carrier devices designed for faster switching. Thus, power transistors typically switch significantly faster than SCRs, enabling higher switching frequencies. Step-by-Step Evaluation: Check A: True. Power transistors are used for higher frequency switching than SCRs.Check R: False. It contradicts the known relative speeds by claiming transistors have greater switching time.Conclusion: A is correct but R is wrong. Verification / Alternative check: Application practice: SCR choppers and inverters are limited to comparatively low frequencies, while MOSFETs and IGBTs operate efficiently at tens of kHz and beyond, reflecting faster switching dynamics. Why Other Options Are Wrong: Any option treating R as correct is inconsistent with established device behavior. Declaring both wrong would dismiss the accurate assertion about relative speed. Common Pitfalls: Confusing di/dt and dv/dt limits with switching time; they are related but not identical metrics. Overlooking that some specialized inverter-grade SCRs are faster but still not as fast as modern transistors for high-frequency PWM. Final Answer: A is correct but R is wrong

Question 9

For a single-phase full-wave controlled rectifier (M-2 connection) feeding an R–L load with input v(t) = Vm sin(ωt), what is the expression for the average (dc) output voltage Vdc under continuous current?

Accepted Answer

Introduction / Context: The average output voltage of a phase-controlled rectifier depends on the firing angle α and the rectifier topology. For a full-wave controlled rectifier using a center-tapped transformer (M-2), a standard closed-form expression exists when current is continuous through the R–L load. Given Data / Assumptions: Single-phase full-wave controlled rectifier (M-2). Input v(t) = Vm sin(ωt). Load is R–L with continuous current (no extinction within the cycle). Firing angle α in the usual 0 to π range. Concept / Approach: For continuous current, each half-cycle contributes an identical controlled conduction segment. The average voltage over one electrical period can be integrated from α to π for each half, producing a well-known result. The total average over the full cycle yields a term proportional to (1 + cos α). Step-by-Step Solution: For one half-cycle: v_o = Vm sin θ from θ = α to θ = π.Average over full cycle uses symmetry of two halves.Compute Vdc = (1/π) * ∫(α to π) Vm sin θ dθ + (1/π) * ∫(π+α to 2π) Vm sin θ dθ.Each integral gives Vm/π * (1 + cos α) / 2; combined over both halves yields Vdc = (Vm/π) * (1 + cos α). Verification / Alternative check: At α = 0, Vdc = 2Vm/π which matches the diode full-wave average. As α increases to π, Vdc approaches 0, consistent with physical expectation. Why Other Options Are Wrong: (Vm/2π)(1+cos α): half-wave result, not full-wave. (2Vm/π) cos α or (Vm/π) cos α: apply to certain bridge forms or different derivations; they do not match the M-2 continuous current case with the 1 + cos α term. (Vm/2)(1+cos α): wrong scaling and units. Common Pitfalls: Using diode rectifier averages for controlled rectifiers without including α. Confusing M-2 with B-2 formulas; topology matters for prefactors. Final Answer: Vdc = (Vm / π) * (1 + cos α)

Question 10

An SCR conducts in the positive half-cycle only. If it is fired at α = 40° and the average anode current is 50 A, what will happen to the average current when the firing angle is changed to α = 80° (same conditions)?

Accepted Answer

Introduction / Context: In a half-wave controlled rectifier with a resistive load, the average output (and hence average current at fixed load resistance) depends on the firing angle α through the term (1 + cos α). Increasing α delays conduction and lowers the average value. This question examines how much it drops when α is increased from 40° to 80°. Given Data / Assumptions: Half-wave controlled rectifier, conduction in the positive half only. Average current at α = 40° is 50 A. Load and supply remain the same; proportionality to (1 + cos α) holds. Resistive behavior so Idc ∝ Vdc. Concept / Approach: For a half-wave controlled rectifier: Vdc ∝ (1 + cos α). So the ratio of average currents equals the ratio of (1 + cos α) values for the two firing angles. Compute this ratio and scale the known current to estimate the new average current at α = 80°. Step-by-Step Solution: At α1 = 40°: factor1 = 1 + cos 40° ≈ 1 + 0.7660 = 1.7660.At α2 = 80°: factor2 = 1 + cos 80° ≈ 1 + 0.1736 = 1.1736.Current ratio = factor2 / factor1 ≈ 1.1736 / 1.7660 ≈ 0.6645.New average current ≈ 50 A * 0.6645 ≈ 33.2 A. Verification / Alternative check: As α increases, conduction window shrinks, so current must drop. A value between 25 A and 50 A fits physical expectations and the computed ratio. Why Other Options Are Wrong: 50 A: implies no change with α, incorrect. 25 A or less than 25 A: too low; would require a much larger α or different load. More than 50 A: contradicts the monotonic decrease of (1 + cos α) with α in 0 to 180°. Common Pitfalls: Using Vdc ∝ cos α (full-wave bridge intuition) instead of the half-wave form. Forgetting to compute the ratio rather than absolute values. Final Answer: less than 50 A but more than 25 A

Question 11

Assertion–Reason (SCR ratings): The surge current that a silicon-controlled rectifier (SCR) can withstand is much higher than its RMS on-state current; this is because the surge duration is very short. Evaluate the statements.

Accepted Answer

Introduction / Context: This item tests understanding of surge (non-repetitive) current capability of an SCR versus its continuous or RMS on-state current rating, and why data sheets allow a much higher one-cycle or few-cycle surge. Surge ratings are fundamental in power electronics for inrush and short-duration fault scenarios. Given Data / Assumptions: Device: SCR operating within manufacturer limits. Comparison: non-repetitive surge current vs RMS on-state current. Surge is of very short duration (typically one mains cycle or a few milliseconds). Concept / Approach: Semiconductor thermal mass and junction-to-case thermal impedance allow a brief energy pulse without exceeding maximum junction temperature. Hence, I_surge may be several times I_T(RMS). Since surge lasts a short time, average heating is limited even though instantaneous current is high. Step-by-Step Solution: Statement A: 'Surge current is much higher than RMS on-state current' → True; typical data sheets show 8–10× or more for one-cycle surge.Statement R: 'Duration of surge current is very small' → True; allowed only for short, non-repetitive intervals.Causality: Short duration limits junction temperature rise, explaining why larger current is permissible briefly → R explains A. Verification / Alternative check: Thermal equation: ΔT ≈ (∫i^2(t) dt) * R_th(j-x) / k; small time window keeps ΔT within safe bounds. Why Other Options Are Wrong: If R did not mention short duration, A would lack justification; here R directly explains A. Common Pitfalls: Confusing surge (non-repetitive) with repetitive overcurrent; ignoring thermal time constants and safe operating area. Final Answer: Both A and R are correct and R is correct explanation of A

Question 12

Single-phase half-wave controlled rectifier with free-wheeling diode (R–L load): for firing angle α, identify the conduction intervals of the SCR and the free-wheeling diode over one cycle.

Accepted Answer

Introduction / Context: This question examines current continuity and commutation in a half-wave controlled rectifier feeding an R–L load with a free-wheeling diode (FWD). Understanding when the SCR and the diode conduct is essential for predicting output voltage and current waveforms. Given Data / Assumptions: Source: single-phase sine voltage. Converter: half-wave controlled rectifier (one SCR) with a free-wheeling diode across the load. Load: R–L (inductive) so current tends to continue when source reverses. Firing angle: α in each positive half-cycle. Concept / Approach: During the positive half-cycle, after firing at ωt = α, the SCR conducts until the source crosses zero at ωt = π. When the source becomes negative (ωt > π), the inductor tries to keep current flowing; the FWD provides a path, clamping load voltage near zero and preventing negative current through the SCR. Thus, the diode conducts from π to 2π (until the source becomes positive again and the next firing occurs). Step-by-Step Solution: SCR interval: from ωt = α (trigger) to ωt = π (natural commutation at zero crossing).FWD interval: from ωt = π to ωt = 2π (freewheeling during negative half-cycle).Therefore: SCR → α < ωt < π; FWD → π < ωt < 2π. Verification / Alternative check: Waveforms show load voltage equals source during SCR conduction and near zero during freewheeling; load current is continuous if L is adequate. Why Other Options Are Wrong: Extending beyond 2π or trimming by α in the negative half-cycle is inconsistent with freewheeling action. Common Pitfalls: Forgetting that the FWD takes over at π; assuming SCR continues into negative half-cycle (it does not). Final Answer: α < ωt < π and π < ωt < 2π

Question 13

Effect of inductive anode circuit on SCR turn-on time: if intrinsic turn-on time is 6 μs, what happens when the anode circuit is inductive?

Accepted Answer

Introduction / Context: Turn-on of an SCR involves charge spreading and current build-up. External circuit inductance limits di/dt, stretching the apparent electrical turn-on interval. Recognizing this helps in snubber and gate design. Given Data / Assumptions: Intrinsic (device) turn-on time t_on,int ≈ 6 μs. Anode circuit includes inductance L that limits current rise. Gate drive is sufficient to trigger. Concept / Approach: Inductance resists rapid current change: v_L = L * di/dt. For a given applied voltage, higher L forces smaller di/dt, delaying attainment of the conduction level at which the device is considered fully on. Hence the effective turn-on time appears longer than the intrinsic value measured under low-inductance test conditions. Step-by-Step Solution: Assume same gate pulse; compare di/dt with and without L.With L present, di/dt decreases → longer time to reach rated conduction → apparent t_on increases.Therefore the practical turn-on time is > 6 μs. Verification / Alternative check: Manufacturers specify di/dt limits; series inductance or saturable reactors are sometimes added purposely to limit di/dt, which inherently increases turn-on interval. Why Other Options Are Wrong: Equal or less than 6 μs ignores the effect of L on current build-up; zero is impossible. Common Pitfalls: Confusing intrinsic charge-spread time with circuit-limited current rise; neglecting v = L di/dt. Final Answer: More than 6 μs

Question 14

Multiphase (interleaved) chopper operation: do all chopper legs switch simultaneously, or are they phase-shifted?

Accepted Answer

Introduction / Context: Multiphase (interleaved) DC–DC choppers are used to reduce input/output ripple, spread thermal stress, and increase dynamic performance. The key mechanism is phase shifting between legs, not simultaneous switching. Given Data / Assumptions: Two or more identical chopper legs paralleled or interleaved. Common input and often common output filter. Goal: ripple cancellation and improved transient response. Concept / Approach: With N phases, each leg is time-shifted by 360°/N in switching period. The ripple currents from each leg partially cancel at the input/output, lowering net ripple and allowing smaller filter components. If all legs switched together, ripple would add rather than cancel, defeating the purpose of a multiphase topology. Step-by-Step Solution: For N phases, set phase shift φ = 360°/N.Operate each leg with same duty D but offset by φ.Result: reduced ripple amplitude, higher effective ripple frequency (N times), better component utilization. Verification / Alternative check: Ripple cancellation can be shown by summing triangular inductor current waveforms with appropriate phase offsets. Why Other Options Are Wrong: 'True': implies simultaneous switching, which increases ripple.Conditional statements (50% duty, current-mode, large L) do not change the fundamental interleaving goal. Common Pitfalls: Believing that identical legs must switch together; overlooking interleaving as the core technique. Final Answer: False

Question 15

Series-connected thyristors: the capacitor value in a dynamic equalizing (voltage-sharing) network is primarily selected based on which device characteristic?

Accepted Answer

Introduction / Context: When SCRs are placed in series for high-voltage applications, differences in device dynamics during turn-off can cause unequal voltage sharing. Dynamic equalizing RC networks mitigate this problem; choosing C correctly is critical. Given Data / Assumptions: Multiple SCRs in series across a high voltage. Each device exhibits slightly different reverse-recovery charge and tail current. Equalizing network: typically a capacitor (with or without a resistor) across each SCR. Concept / Approach: During commutation or reverse recovery, some devices cease conduction earlier and start blocking sooner, momentarily taking higher voltage. The capacitor provides a transient current path so that device voltages share more evenly. Therefore, C is chosen based on worst-case reverse-recovery behavior (charge, time, di/dt) and expected dv/dt across devices, not on steady forward characteristics. Step-by-Step Solution: Identify worst-case reverse-recovery differences between series devices.Select C so that i_C = C * dv/dt can accommodate transient imbalances.Choose accompanying resistor to damp oscillations and equalize static division if required. Verification / Alternative check: Manufacturers provide guidance: C sized from expected dv/dt and Q_rr spread to keep transient V across each SCR within limits. Why Other Options Are Wrong: Forward conduction traits do not govern turn-off imbalance; gate trigger spread affects timing, but the dominant stress is during reverse recovery. Common Pitfalls: Confusing static equalization (resistors) with dynamic equalization (capacitors) and overlooking reverse-recovery spread. Final Answer: Reverse-recovery characteristics

Question 16

On–off (integral-cycle) control of an electric heater using thyristors: if the duty ratio α = 0.4, what fraction of maximum heating power is delivered?

Accepted Answer

Introduction / Context: On–off (burst or integral-cycle) control applies whole cycles of AC to a resistive heater, then skips cycles. Average power is proportional to the duty ratio over a control window. This is common in industrial heating due to low EMI compared to phase control. Given Data / Assumptions: Resistive load (heater), so P ∝ V_rms^2 and scales linearly with applied cycle fraction. Duty ratio α = fraction of time (or cycles) power is applied within a fixed period. Line voltage constant when applied. Concept / Approach: For integral-cycle control, during ON cycles the heater sees full voltage; during OFF cycles it sees zero. Over the control window, average power equals α * P_max, where P_max is power with continuous ON (α = 1). Thus heating fraction equals α expressed as a percentage. Step-by-Step Solution: Duty ratio α = 0.4.Average power P_avg = α * P_max = 0.4 * P_max.Hence heating fraction = 40% of maximum. Verification / Alternative check: Equivalent thermal response integrates power; for purely resistive loads, no reactive effects alter average energy per window. Why Other Options Are Wrong: 16% would correspond to α = 0.16; 60% corresponds to α = 0.6; 84% to α = 0.84; 20% to α = 0.2. Common Pitfalls: Confusing phase-angle control (nonlinear relation) with integral-cycle control (linear in α). Final Answer: 40% of maximum

Question 17

Half-wave controlled rectifier feeding a resistive load: given Vdc = 127 V at firing angle α = 0°, estimate the average output voltage when α = 30°.

Accepted Answer

Introduction / Context: This computation applies the average voltage formula for a single-phase half-wave controlled rectifier with a resistive load. It illustrates how firing angle reduces the DC component of the output. Given Data / Assumptions: At α = 0°, Vdc0 = 127 V. Load is purely resistive (no freewheeling). Supply is sinusoidal with peak Vm (unknown explicitly). Concept / Approach: For a half-wave controlled rectifier, average output voltage is Vdc(α) = (Vm / (2π)) * (1 + cos α). When α = 0°, Vdc0 = Vm / π → Vm = π * Vdc0. We can reuse Vm to compute Vdc at α = 30° without knowing the actual mains value. Step-by-Step Solution: From α = 0°: Vm = π * 127.At α = 30°: Vdc(30°) = (Vm / (2π)) * (1 + cos 30°).Compute factor: (1 + cos 30°) = 1 + 0.866 ≈ 1.866.Thus Vdc(30°) = (π * 127 / (2π)) * 1.866 = 127 * 0.933 ≈ 118.5 V ≈ 120 V. Verification / Alternative check: A quick ratio check: Vdc(α) / Vdc0 = (1 + cos α) / 2 = (1 + 0.866) / 2 = 0.933 → 127 * 0.933 ≈ 118.5 V. Why Other Options Are Wrong: 127 V ignores the firing delay; 110 V and 100 V correspond to larger α; 135 V exceeds the α = 0° reference and is impossible. Common Pitfalls: Using the full-wave formula Vdc = (Vm/π) * cos α by mistake; misapplying degrees vs radians in cosine. Final Answer: 120 V

Question 18

High-voltage string design: a 3 kV DC circuit uses SCRs rated at 800 V each. With 25% derating, how many SCRs must be connected in series?

Accepted Answer

Introduction / Context: Series connecting SCRs requires voltage derating to accommodate tolerances, temperature, and transient imbalance. This calculation finds the minimum number of devices for a specified DC bus. Given Data / Assumptions: Bus voltage V_total = 3000 V. Device rating V_Rated = 800 V per SCR. Derating = 25%, so usable per device is 0.75 * 800 V. Concept / Approach: With derating, allowable steady blocking voltage per SCR becomes V_use = 0.75 * V_Rated. The required count is N ≥ V_total / V_use, rounded up to the next integer. Step-by-Step Solution: Compute usable per SCR: V_use = 0.75 * 800 = 600 V.Compute count: N = 3000 / 600 = 5 exactly.Therefore, 5 SCRs in series meet the derated requirement. Verification / Alternative check: Total derated withstand = 5 * 600 = 3000 V → matches bus voltage (ignoring transients; equalizing networks still recommended). Why Other Options Are Wrong: 4 devices give only 2400 V derated; 6 or more are conservative but not minimal; 8/7 oversize unnecessarily. Common Pitfalls: Forgetting to derate; confusing AC peak vs DC; not rounding up for non-integer results. Final Answer: 5

Question 19

Identify the correct terminal names of a power MOSFET used in power electronics.

Accepted Answer

Introduction / Context: Device terminal identification is foundational for correct connection and analysis. Power MOSFETs dominate switching converters, motor drives, and SMPS designs, and their three terminals have standardized names. Given Data / Assumptions: Device: power MOSFET (enhancement-mode). Three external terminals. Standard industry nomenclature. Concept / Approach: A MOSFET has a Gate (G) controlling channel conductivity between Source (S) and Drain (D). In contrast, BJTs have Emitter, Base, Collector; SCRs have Anode, Cathode, Gate. Therefore, the correct terminal set for a MOSFET is Source, Gate, Drain. Step-by-Step Solution: Map device family → MOSFET.Recall standard names → Source, Gate, Drain.Eliminate names belonging to BJTs (E, B, C) or thyristors (A, K, G). Verification / Alternative check: Check typical MOSFET symbol: Arrow on body diode indicates S–D orientation; gate insulated from channel. Why Other Options Are Wrong: Emitter/Base/Collector → BJT; Cathode/Anode/Gate → SCR/triac family; mixed sets are invalid. Common Pitfalls: Confusing BJT and MOSFET terminals due to similar three-lead packaging. Final Answer: Source, Gate, Drain

Question 20

Three-phase fully controlled bridge converter: the effective firing sequence (pulse) frequency is how many times the line frequency?

Accepted Answer

Introduction / Context: Pulse frequency determines the ripple frequency in the DC output and the gating pattern of a 3-phase fully controlled rectifier. Understanding its relationship to mains frequency is crucial for filter design and control timing. Given Data / Assumptions: Topology: 3-phase full bridge (six SCRs, one per 60° conduction window). Balanced three-phase supply. Continuous conduction assumed for standard operation. Concept / Approach: In a 3-phase 6-pulse bridge, a device is fired every 60 electrical degrees, resulting in six firing events each line cycle. Therefore, the pulse frequency f_p = 6 * f_line. This also sets the dominant DC ripple at 6f_line for continuous current operation. Step-by-Step Solution: Line cycle = 360°.One gate command every 60° → 6 pulses per cycle.Thus, f_pulses = 6 * f_line. Verification / Alternative check: The converter is known as a '6-pulse' rectifier; harmonic spectra show ripple at 6f, 12f, 18f, etc. Why Other Options Are Wrong: 3f corresponds to a 3-pulse (half-controlled) system; 9f/12f do not match the standard 6-pulse bridge. Common Pitfalls: Confusing device conduction angle (120°) with the firing interval (60°) and resultant pulse count. Final Answer: 6 times the line frequency

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