Question 1

Single-phase half-wave controlled rectifier with R–L load and a freewheeling diode (FWD) When the freewheeling diode is conducting in this circuit, what is the bias state of the SCR (thyristor)?

Accepted Answer

Introduction / Context: In controlled rectifiers with inductive (R–L) loads, a freewheeling diode (FWD) is often added across the load to provide a path for the inductor current when the source voltage reverses or the thyristor (SCR) turns off. Understanding which device conducts at different parts of the input cycle is essential for analyzing current paths, device stresses, and average output. Given Data / Assumptions: Single-phase half-wave controlled rectifier using one SCR feeding an R–L load. A freewheeling diode is placed across the load with correct polarity. Supply is sinusoidal; the load inductance causes current to persist beyond source zero crossings. Concept / Approach: When the AC source goes negative (or whenever the source voltage is less than the load’s induced back EMF), the FWD provides a low-impedance path for the decaying inductor current. With the FWD clamping the load voltage close to zero (approximately the diode drop), the supply appears across the SCR in reverse, thereby reverse-biasing it and preventing conduction through the SCR. Step-by-Step Solution: Assume SCR had previously been triggered and load current is flowing.As the source voltage falls and crosses zero, the inductor attempts to maintain current.The FWD becomes forward biased and takes over the current path across the load.With FWD conducting, the load terminals are clamped near diode drop; the line (anode) is negative with respect to the cathode of the SCR during negative half-cycle.Hence, the SCR anode is at lower potential than its cathode: the SCR is reverse biased. Verification / Alternative check: Using polarities: during negative input, source anode at a lower potential than cathode; FWD conducts and provides local loop for the inductor, so the SCR sees reverse voltage and cannot conduct until next appropriate positive half-cycle and gate trigger. Why Other Options Are Wrong: Forward biased (A): Not when FWD is conducting; the anode is negative relative to cathode. May be forward or reverse (C): In this standard topology it is reverse biased during FWD conduction. Forward then reverse (D): The described condition is specifically the FWD conduction interval, during which the SCR remains reverse biased. Common Pitfalls: Confusing the moment of SCR turn-off with FWD conduction. Once FWD is on, the SCR is not carrying current and is reverse biased until the next positive cycle and proper gating. Final Answer: is reverse biased

Question 2

Single-phase semiconverter with highly inductive load and freewheeling diode If the firing angle is α (radians), what is the total conduction duration of the freewheeling diode in one input cycle?

Accepted Answer

Introduction / Context: Semiconverters (half-controlled bridges) feeding highly inductive loads commonly include a freewheeling diode (FWD) across the load. The FWD conducts whenever the supply cannot support the instantaneous polarity required by the decaying inductor current. Knowing the conduction intervals helps determine average output voltage, device currents, and ripple. Given Data / Assumptions: Single-phase semiconverter (two SCRs and two diodes) with a highly inductive load. Freewheeling diode is connected across the load. Firing angle of SCRs is α (in radians). Continuous current is assumed due to high inductance. Concept / Approach: In each half-cycle, controlled devices conduct from the firing instant to the point where the source reverses insufficiently to maintain conduction; then the FWD takes over for the remainder up to the next firing instance. For a semiconverter with continuous current, the FWD typically conducts over an interval equal to α within each half-cycle. Step-by-Step Solution: In a positive half-cycle, the SCR is triggered at angle α and conducts until the source crosses zero.From ωt = π to ωt = π + α, the source is negative and cannot sustain the current; the FWD conducts (duration = α in this half-cycle).Similarly, in the negative half-cycle, the appropriate devices conduct from ωt = π + α to 2π, and the FWD then conducts from ωt = 2π to 2π + α (mapped to the next cycle), again for duration α.Thus, total FWD conduction per full cycle = α + α = 2α. Verification / Alternative check: Waveform analysis of load voltage shows clamping to near zero during freewheeling; the span equals the delay before the next device firing in each half-cycle, which is α, summing to 2α per cycle. Why Other Options Are Wrong: α (A): Only one half-cycle; full cycle requires doubling to 2α. 4α (C): Overcounts; there are only two freewheeling intervals per cycle. 0.5α (D): Underestimates by a factor of four for the full cycle. Common Pitfalls: Forgetting that semiconverters have asymmetric device conduction yet the FWD still freewheels once per half-cycle, leading to 2α total per cycle under continuous current. Final Answer: 2 α

Question 3

DIAC terminal nomenclature and symmetry A DIAC (diode for alternating current) has two terminals named “anode” and “cathode.” Is this statement correct?

Accepted Answer

Introduction / Context: DIACs are bidirectional trigger devices commonly used to fire TRIACs and for symmetrical triggering in AC control circuits. Clarifying their terminal naming helps avoid confusion in design and wiring. Given Data / Assumptions: Standard DIAC structure is symmetrical. Unlike a conventional diode, it conducts in both directions after its breakover voltage is reached. Concept / Approach: Because a DIAC is symmetrical and intended for bidirectional conduction, its terminals are not designated anode and cathode. Instead, they are often labeled MT1 and MT2 or simply terminal 1 and terminal 2, indicating interchangeability. Step-by-Step Solution: Identify whether the device enforces a preferred polarity: DIAC does not.Terminal naming should not imply polarity; therefore “anode/cathode” is inappropriate.Conclude the statement is false. Verification / Alternative check: Reference DIAC datasheets show symmetrical V-I characteristics and interchangeable terminals (no anode/cathode assignment). Why Other Options Are Wrong: True (A): Incorrect; DIAC is bidirectional and symmetric. Polarity-dependent (C/D): Misconception; DIAC breakover is similar in both directions. Common Pitfalls: Confusing DIAC with TRIAC or with unidirectional thyristors where anode/cathode naming is appropriate. Final Answer: False

Question 4

SCR rated current versus holding current A thyristor (SCR) is rated at 40 A. Approximately what is the order of its holding current (Ih)?

Accepted Answer

Introduction / Context: Holding current (Ih) is the minimum anode current below which a conducting SCR will turn off (cease conduction) when the external circuit allows it. It is crucial for commutation behavior and low-current turn-off in controlled rectifiers. Given Data / Assumptions: SCR rated current = 40 A (continuous anode current rating). Typical power SCRs have holding currents in the tens to hundreds of milliamps range, much lower than their rated currents. Concept / Approach: In practical SCRs, latching and holding currents are small fractions of rated current. While exact values depend on device construction, a 40 A SCR commonly exhibits Ih on the order of 50–200 mA. Hence, 100 mA is a reasonable choice among the options. Step-by-Step Solution: Recognize Ih ≪ rated current for power SCRs.Select the option in the typical mA range: 100 mA.Exclude ampere-level values which are unrealistically high for Ih. Verification / Alternative check: Datasheets for SCRs in the 25–100 A class commonly specify Ih in tens to hundreds of milliamps, supporting the selection. Why Other Options Are Wrong: 20 A / 4 A / 1 A: Far too high for holding current; these would make commutation impractical. 10 mA: Possible for smaller devices, but typically low for a 40 A device; 100 mA better matches typical power SCRs. Common Pitfalls: Confusing holding current with gate current or latching current; these are different specifications. Final Answer: 100 mA

Question 5

Induction heating inverter frequency requirement Induction heating systems require low-frequency inverters. Is this statement correct?

Accepted Answer

Introduction / Context: Induction heating uses alternating magnetic fields to induce eddy currents in a workpiece. The choice of frequency controls the penetration depth (skin depth) and heating distribution, and therefore must match the application (surface hardening, brazing, melting, etc.). Given Data / Assumptions: Induction heating frequency ranges commonly from a few hundred hertz to hundreds of kilohertz. Skin depth δ ∝ 1 / sqrt(f), where f is frequency. Concept / Approach: Higher frequency results in shallower penetration (good for surface hardening/brazing). Lower frequency gives deeper penetration (useful for bulk heating of larger cross-sections). However, “low frequency” in the context of power electronics often still means >100 Hz up to several kHz, and many induction systems operate in the kHz to hundreds of kHz range—certainly not “low” compared to mains frequency for most applications. Step-by-Step Solution: Identify target: surface vs. bulk heating determines f.Typical industrial units: ~1 kHz to 450 kHz (or higher) using resonant inverters.Therefore, the blanket statement “require low frequency” is incorrect. Verification / Alternative check: Application notes and catalogs for induction heaters specify medium-to-high frequencies to tailor skin depth; lower frequencies are used only for very deep heating of large workpieces. Why Other Options Are Wrong: True (A): Overgeneralization; most systems are medium/high frequency. Application-specific (C/D): Even these use varied frequencies; not universally low. Common Pitfalls: Equating “industrial” with “low frequency.” Induction heating efficiency and process control often favor higher frequencies. Final Answer: False

Question 6

Static induction thyristor (SITH) device behavior Which statement correctly describes a static induction thyristor?

Accepted Answer

Introduction / Context: The static induction thyristor (SITH) is a high-power, high-speed device conceptually related to the static induction transistor (SIT). It offers lower turn-off times than conventional SCRs and is suited to higher frequency power conversion compared with classic thyristors. Given Data / Assumptions: SITH structure provides a short carrier transit path and relies largely on majority carrier transport. Gate control can influence conduction without the long charge storage of classic minority-carrier SCRs. Concept / Approach: Majority carrier operation supports faster switching because stored charge removal is minimal compared with conventional minority-carrier devices. SITH devices therefore achieve relatively rapid switching and lower tail currents than traditional thyristors, making them appropriate for higher-frequency converters. Step-by-Step Solution: Identify whether charge storage (minority carriers) dominates: for SITH, it is reduced.Conclude the device operation is mainly majority carrier in nature.Therefore, option indicating majority carrier and faster switching is correct. Verification / Alternative check: Comparative literature places SITH operation closer to SIT/IGBT-like fast switching behavior than to slow classic SCR behavior, consistent with majority carrier dominance. Why Other Options Are Wrong: Minority carrier (B): Would imply slow turn-off, not representative of SITH advantages. Either majority/minority (C): Not accurate characterization. Two leads (D): A thyristor is a controlled device; it uses at least three terminals (anode, cathode, gate). Common Pitfalls: Confusing SITH with conventional SCRs or SITs; while related, the thyristor variant emphasizes fast control with minimal charge storage. Final Answer: It is primarily a majority carrier device enabling fast switching.

Question 7

Use of a UJT (uni-junction transistor) in SCR control Which of the following is a standard application of the UJT in thyristor circuits?

Accepted Answer

Introduction / Context: The UJT is widely used as a simple, reliable relaxation oscillator for generating gate pulses. In phase-control circuits, it triggers the SCR at a controlled delay each half-cycle. Given Data / Assumptions: UJT exhibits negative resistance and can form timing networks (RC) to create sawtooth or pulses. SCR gate requires a properly timed pulse to initiate conduction. Concept / Approach: The UJT relaxation oscillator charges a capacitor through a resistor until the UJT fires at its intrinsic standoff ratio, discharging the capacitor and producing a sharp pulse—ideal for SCR gate triggering. Step-by-Step Solution: Design RC values for desired firing angle.Use UJT pulse to drive an isolating pulse transformer or gate circuit.SCR turns on at each intended point on the AC waveform. Verification / Alternative check: Classic lamp dimmers and AC controllers employ UJT-based trigger modules feeding SCR/triac gates. Why Other Options Are Wrong: Turning off an SCR (B/C): Direct turn-off requires current to fall below holding current or forced commutation; UJT alone cannot perform this. Common Pitfalls: Assuming any transistor can both fire and commutate an SCR; commutation typically needs additional circuitry. Final Answer: Firing an SCR (gate triggering)

Question 8

Gate triggering of a reverse-biased thyristor A thyristor (SCR) is reverse biased between anode and cathode. If a positive gate pulse is applied, what happens?

Accepted Answer

Introduction / Context: Thyristors require two conditions to conduct: proper gate triggering and correct anode-to-cathode polarity (forward bias). Gate pulses alone cannot force conduction against a reverse anode-cathode voltage. Given Data / Assumptions: Anode is at a lower potential than cathode (reverse bias). Gate receives a positive pulse referenced to cathode. Concept / Approach: Gate triggering lowers the forward breakover requirement when the device is forward-biased. Under reverse bias, the junctions are not in a state that supports thyristor conduction; the device remains off, aside from small leakage current, until forward bias is restored. Step-by-Step Solution: Identify device state: reverse biased anode-cathode.Apply gate pulse: does not overcome reverse blocking capability.Conclusion: device stays off. Verification / Alternative check: Device I-V curves show negligible gate influence in reverse quadrant; turn-on requires forward quadrant conditions. Why Other Options Are Wrong: Will turn on (A) / after delay (D): Not possible under reverse bias. May or may not (B): Ambiguous; physics says it will not under reverse bias. Common Pitfalls: Assuming the gate alone can force conduction in any polarity; SCRs are polarity-sensitive controlled devices. Final Answer: It will not turn on

Question 9

Average thyristor current in a 3-phase full converter A 3-phase fully controlled bridge converter supplies an average (DC) load current of 150 A. What is the average current through each thyristor?

Accepted Answer

Introduction / Context: In a 3-phase 6-pulse full converter, each thyristor conducts for 120 electrical degrees in each cycle. The relationship between average DC load current and average device current follows from the conduction pattern of the six devices. Given Data / Assumptions: Six SCRs conduct in sequence; at any time two devices conduct (one from the top group, one from the bottom group). Average DC load current, Idc = 150 A (continuous current assumed). Concept / Approach: Because each individual SCR carries the load current for 120° out of every 360°, the average current in one device over a full cycle equals Idc multiplied by the duty fraction (120/360 = 1/3). Therefore, Iavg_thyristor = Idc/3. Step-by-Step Solution: Conduction interval per device = 120°.Duty fraction = 120/360 = 1/3.Iavg_thyristor = Idc * (1/3) = 150 * (1/3) = 50 A. Verification / Alternative check: Instantaneous current through a conducting device equals line current ≈ load current (ideal case). Averaging over one period with 1/3 duty confirms 50 A. Why Other Options Are Wrong: 150 A (A): Would imply continuous conduction through a single device, which is not the case. 75 A (B): Corresponds to 1/2 duty, not applicable. 25 A (D): Would imply 1/6 duty, incorrect for 120° conduction. Common Pitfalls: Confusing RMS with average; here the question explicitly asks for average current per thyristor. Final Answer: 50 A

Question 10

Lead count of a power semiconductor diode How many external leads (terminals) does a standard power semiconductor diode have?

Accepted Answer

Introduction / Context: Power semiconductor diodes are two-terminal devices used for rectification, freewheeling, and snubbing. Recognizing terminal count is basic device knowledge needed for circuit identification and troubleshooting. Given Data / Assumptions: Device under consideration is a standard power diode, not a controlled switch. Terminals are typically labeled anode and cathode. Concept / Approach: A diode conducts current primarily in one direction (anode to cathode) and blocks in the reverse direction. It therefore has exactly two external terminals—unlike controlled devices (thyristors, transistors) that include a third control terminal. Step-by-Step Solution: Identify device type: diode (uncontrolled).Confirm terminals: anode and cathode.Hence, the number of leads is 2. Verification / Alternative check: Datasheets and package drawings (stud, press-fit, TO-packages) show two terminals; mounting hardware does not constitute an electrical terminal. Why Other Options Are Wrong: 3 or 4 leads: Would imply additional control or sensing terminals; not a standard diode. Common Pitfalls: Mistaking a diode module (with multiple diodes inside) for a single diode; the module may have more external connections but each diode element still has two terminals. Final Answer: 2

Question 11

Three-phase AC voltage controller (full-wave) feeding a star-connected resistive load What is the permissible firing angle range α for a 3-phase full-wave regulator with a resistance load (star connection)?

Accepted Answer

Introduction / Context: Three-phase AC voltage controllers (also called regulators) use phase control on each phase to vary the RMS output voltage supplied to a load. For a resistive, star-connected load, the achievable control range of the firing angle α is limited by natural commutation intervals and overlap between phases. Given Data / Assumptions: Three-phase, full-wave regulator topology (two antiparallel thyristors per phase). Star-connected purely resistive load (no significant inductance). Idealized commutation without overlap for the range reasoning. Concept / Approach: In a 3-phase full-wave controller, each phase can be delayed by α with respect to its phase voltage zero crossing. Because line-to-line voltages are displaced by 60°, the control range is restricted so that proper conduction sequences still occur without creating undefined intervals. For R-loads, the classical limit for full control is α up to 150° so that at least one device can conduct as phase voltages cycle. Step-by-Step Solution: Phase-angle control is measured from each phase voltage zero crossing.With three phases 60° apart, conduction windows must overlap sufficiently to maintain defined output.Analysis of the conduction pattern shows that beyond α = 150°, proper conduction ceases; therefore α is limited to 0–150°. Verification / Alternative check: Standard drive and power-electronics texts tabulate these limits: for 3-phase full-wave controllers on R-loads, α ∈ [0°, 150°] ensures continuous, predictable gating sequences. Why Other Options Are Wrong: 0–180°: exceeds the permissible commutation window. 0–120° or 0–90°: needlessly restrictive; full control up to 150° is achievable. 15–165°: does not reflect the standard definition of α or the true upper bound. Common Pitfalls: Confusing rectifier α limits with AC controller limits. Ignoring the 60° phase displacement effect on conduction windows. Final Answer: 0 ≤ α ≤ 150°

Question 12

Single-phase full-wave converter (M-2, center-tap): peak inverse voltage (PIV) A single-phase full-wave converter (M-2 connection) uses a center-tapped secondary. The RMS voltage across each half of the secondary is 300 V. What is the PIV rating req…

Accepted Answer

Introduction / Context: In a center-tapped, single-phase full-wave converter (M-2), the non-conducting thyristor must withstand the inverse voltage when the other device conducts. Correctly estimating the peak inverse voltage (PIV) is essential for device selection and reliability. Given Data / Assumptions: Center-tapped transformer with each half secondary RMS = 300 V. Ideal transformer and devices, no commutation overlap. PIV for each thyristor in a center-tap full-wave configuration equals twice the peak of the half-secondary. Concept / Approach: For a center-tapped secondary, the peak of each half is V_m,half = Vrms,half * sqrt(2). When one thyristor conducts, the other sees the sum of the instantaneous voltages of both halves, reaching approximately 2 * V_m,half as the peak inverse voltage. Step-by-Step Solution: Compute peak of half secondary: V_m,half = 300 * sqrt(2) ≈ 424.3 V.PIV per thyristor = 2 * V_m,half ≈ 2 * 424.3 ≈ 848.6 V.Round to a practical rating ≈ 850 V; designers typically choose the next standard device rating (e.g., 1,000 V) with margin. Verification / Alternative check: Well-known result: for center-tap full-wave rectifiers (diodes or SCRs), PIV ≈ 2 * V_m,half. Why Other Options Are Wrong: 300 V or 600 V: use RMS values or a single peak; both undervalue the true PIV. 1,200 V: overly conservative for the stated RMS value (though may be chosen for margin). 600^2 V: meaningless. Common Pitfalls: Mistaking total secondary RMS for half-winding RMS in PIV calculations. Confusing RMS with peak quantities. Final Answer: 850 V (approximately)

Question 13

Single-phase full-wave AC voltage regulator feeding an R–L load The minimum firing angle α can be set to zero degrees. Is this statement correct?

Accepted Answer

Introduction / Context: Single-phase full-wave AC voltage regulators (two antiparallel SCRs) control the RMS voltage applied to a load by delaying turn-on within each half-cycle. For R–L loads, designers often ask whether firing exactly at the zero crossing (α = 0°) is allowed. Given Data / Assumptions: Two SCRs in antiparallel (full-wave regulator). Supply is sinusoidal; load is R–L. Idealized commutation; finite load inductance may extend current beyond 180°. Concept / Approach: The firing angle α is measured from the start of each half-cycle. There is no prohibition against triggering at α = 0°; doing so simply applies the full sinewave at that instant. With inductive loads, current may persist past the natural current zero due to stored energy, but that does not forbid α = 0°—it affects extinction behavior instead. Step-by-Step Solution: At α = 0°, gate pulses are applied at each zero crossing.SCRs conduct from near the start of the half-cycle; inductor current lags the voltage.Natural commutation occurs at the subsequent current zero; the next device then takes over. Verification / Alternative check: AC controllers routinely demonstrate α ranging from 0° up to a topology-dependent maximum; α = 0° corresponds to the maximum output RMS voltage. Why Other Options Are Wrong: False: contradicts standard operation. Conditions like “only with unity power factor” or “only with a free-wheeling diode” are unnecessary in full-wave AC control. Common Pitfalls: Confusing rectifiers (DC output) with AC regulators; free-wheeling diodes are typical in DC converters, not AC regulators. Believing inductance forbids α = 0°; it only affects extinction timing. Final Answer: True

Question 14

Single-phase half-wave converter into a resistive load Just before triggering (gating) the thyristor in a half-wave converter supplying a pure R-load, the voltage across the thyristor is:

Accepted Answer

Introduction / Context: In a single-phase half-wave controlled rectifier with a resistive load, the thyristor is reverse-biased or forward-blocked until a firing pulse is applied at angle α. The device then turns on and conducts for the remainder of that half-cycle. Given Data / Assumptions: Purely resistive load (no energy storage). Sinusoidal input voltage. Thyristor is ideal and off before triggering. Concept / Approach: When the SCR is off, it behaves as an open switch. The full instantaneous source voltage therefore appears across the device. At the firing instant, the device turns on and the anode-to-cathode voltage collapses to a small conduction drop while current flows. Step-by-Step Solution: Before gate pulse at angle α: SCR open → v_SCR ≈ v_source (instantaneous).At firing: SCR conducts → v_SCR drops to a small on-state value.Since load is resistive, current is in phase with applied segment. Verification / Alternative check: Textbook waveforms for half-wave controlled rectifiers show device voltage tracking the supply until firing, then clamping to low on-state voltage during conduction. Why Other Options Are Wrong: Zero or ~1 V: only true after turn-on. Twice input: not applicable here. Average output: unrelated to instantaneous device blocking voltage. Common Pitfalls: Confusing average DC values with instantaneous AC waveforms. Forgetting that an open device sees nearly the full source voltage. Final Answer: Equal to the instantaneous input (supply) voltage

Question 15

Effect of current chopping in inductive circuits Current chopping (forced current interruption at a non-zero value) primarily causes which transient?

Accepted Answer

Introduction / Context: Current chopping occurs when a current in an inductive path is interrupted rapidly before naturally decaying to zero. This is common in circuit breakers and some controlled converters, and understanding the resulting transient is crucial to insulation coordination and snubber design. Given Data / Assumptions: Load includes inductance L, storing energy ½ * L * I^2. Interruption is fast compared to the circuit’s natural time constant. No ideal clamp present unless stated. Concept / Approach: Inductors oppose sudden change in current. For a rapid current drop, the inductor generates a voltage v_L = L * di/dt in whatever polarity is needed to keep current flowing. A large negative di/dt therefore produces a high magnitude voltage spike, risking insulation breakdown unless snubbers, varistors, or free-wheeling paths are provided. Step-by-Step Solution: Assume current I is chopped to a smaller value (even to zero) in a short time Δt.Then di/dt ≈ −I/Δt → large magnitude.Induced voltage v_L = L * di/dt → large over-voltage unless clamped. Verification / Alternative check: Oscillograms of chopped currents show voltage spikes coincident with interruption. Proper snubbers limit dv/dt and peak v. Why Other Options Are Wrong: Over-current: chopping reduces current; the main risk is voltage rise. “Both” or “either”: without a resonant overshoot path, the primary concern is over-voltage. “No transient”: contradicts inductor behavior. Common Pitfalls: Underestimating energy ½LI^2 released into stray capacitances, creating high dv/dt. Forgetting to add snubbers/free-wheel diodes in inductive paths. Final Answer: Over-voltage

Question 16

Dual converter operating mode “In a dual converter operating in non-circulating current mode, a reactor (inter-connecting inductor) is used.” Is this statement correct?

Accepted Answer

Introduction / Context: Dual converters provide reversible DC voltage/power using two controlled bridges (converter groups) connected to the same DC load. They can operate in circulating-current mode or non-circulating-current mode, with different hardware requirements. Given Data / Assumptions: Two full converters share the same DC terminals. Non-circulating mode means only one bridge conducts at a time. A reactor between bridges is used when both bridges may conduct simultaneously. Concept / Approach: In circulating-current mode, both bridges are biased to produce nearly equal and opposite voltages; an inter-bridge reactor limits the circulating current. In non-circulating-current mode, gating ensures only one bridge conducts at any time; therefore no steady circulating current flows and no interconnecting reactor is required. Step-by-Step Solution: Identify the mode: non-circulating.Consequence: only one converter is active at a time.Conclusion: no reactor is needed to limit inter-bridge current because bridges are not simultaneously on. Verification / Alternative check: Standard DC drive schematics show the reactor explicitly in circulating-current mode diagrams; it is absent for non-circulating implementations. Why Other Options Are Wrong: “True” or conditional variants contradict the definition of non-circulating mode. Load inductance does not create inter-bridge circulating current when one bridge is disabled. Common Pitfalls: Assuming the reactor is universal to all dual converters. Confusing smoothing reactor on the DC side with inter-bridge reactor between converters. Final Answer: False

Question 17

SCR gate drive practice: pulse triggering rationale Assertion (A): The gate current of an SCR is always applied in the form of pulses. Reason (R): With pulse triggering, gate losses are low.

Accepted Answer

Introduction / Context: Gate-drive strategies for SCRs (thyristors) balance reliable turn-on against power dissipation and electromagnetic compatibility. While pulse triggering is common, it is not universally mandatory in all applications. Given Data / Assumptions: Assertion claims “always pulses.” Reason claims pulse drive reduces average gate power (loss). Some DC circuits use continuous gate bias (e.g., for assured latching under marginal conditions). Concept / Approach: SCRs require a gate current above a threshold for a brief duration to transition to conduction, after which the gate can be removed. Pulse gating achieves this with minimal average gate power and reduced heating. However, continuous or long-duration gate drive is sometimes used (e.g., in noisy environments or when di/dt conditions are uncertain). Hence “always pulses” is too strong. Step-by-Step Solution: Evaluate A: Over-generalized; not always pulses → A is wrong.Evaluate R: Pulse drive indeed minimizes gate losses by limiting conduction time and average current → R is correct.Therefore the correct relationship is: A is wrong but R is correct. Verification / Alternative check: Manufacturer application notes describe both pulse and continuous gate techniques; pulse gating is preferred for efficiency but is not the only method used. Why Other Options Are Wrong: Options assuming A is correct contradict practical designs using continuous gate drive. Both wrong: R is widely accepted as true. Common Pitfalls: Equating “common practice” with “always required.” Ignoring cases with long gate pulse trains for noise immunity. Final Answer: A is wrong but R is correct

Question 18

Integral-cycle (on–off) control timing For integral-cycle control of a power load, the on–off control period should be compared to the mechanical time constant of the load in which way?

Accepted Answer

Introduction / Context: Integral-cycle control (burst firing) applies whole cycles of AC to a load and then skips cycles. For mechanical systems (e.g., heaters with thermal inertia, motors with inertia), choosing the modulation period relative to the system’s time constant affects ripple and performance. Given Data / Assumptions: Power delivered in bursts of complete cycles (on) and off intervals. Load exhibits a dominant mechanical or thermal time constant τ_m. Goal: smooth average response without large oscillations. Concept / Approach: If the on–off period is much shorter than τ_m, the load averages the power, producing a smooth output (e.g., stable temperature or speed). If the period is longer than τ_m, the response will swing noticeably between on and off, creating unacceptable ripple. Step-by-Step Solution: Define desired behavior: minimal ripple in the controlled variable.Choose control period T_ctrl such that T_ctrl ≪ τ_m.Therefore the correct relation is that the period should be less than the mechanical time constant. Verification / Alternative check: Classical control guidance: sample or modulation intervals should be small compared with the plant time constant to approximate continuous control. Why Other Options Are Wrong: “Greater than”: increases ripple and oscillations. “Equal”: offers no general guarantee of smoothness. “Unrelated”: incorrect; τ_m directly informs suitable burst periods. Common Pitfalls: Setting very long bursts for convenience, causing thermal or speed cycling. Ignoring differences between electrical and mechanical/thermal time constants. Final Answer: It should be less than the mechanical time constant

Question 19

Single-phase series converter made from two semi-converters Two identical semi-converters are connected in series to form a single-phase series converter supplied by v(t) = V_m sin(ωt). Let the firing angles be equal (α1 = α2 = α). If α1 = α2 = 0°, …

Accepted Answer

Introduction / Context: A series converter formed by two semi-converters is used to improve input current symmetry and power factor compared to a single semi-converter. Understanding its average DC output at specific firing angles helps compare it with standard rectifier topologies. Given Data / Assumptions: Input: v(t) = V_m sin(ωt). Two identical semi-converters in series, α1 = α2 = α. Consider α = 0° (immediate firing at each half-cycle start). Ideal devices; continuous, non-overlapping commutation considered. Concept / Approach: For a single semi-converter, the average output is V_dc,semi = (V_m / π) * (1 + cos α). With a properly phased series converter using equal angles, the resulting average voltage equals that of a full-controlled bridge at the same α for α within the practical range; at α = 0°, this reduces to V_dc = 2 V_m / π. Step-by-Step Solution: Recall: full-controlled bridge at α = 0° gives V_dc = 2 V_m / π.The series arrangement of two semi-converters with α1 = α2 yields an equivalent average characteristic matching the full bridge at α = 0°.Therefore, at α = 0°, V_dc = 2 V_m / π. Verification / Alternative check: Comparative plots of V_dc vs α show the series-converter curve coinciding with the full bridge at the end conditions, including α = 0°. Why Other Options Are Wrong: (0) or (V_m/π): undervalue the rectified average at zero firing angle. (4 V_m/π): double counts; not supported by the series topology. (V_m/2): unrelated to average rectified values. Common Pitfalls: Assuming two semi-converters simply add outputs arithmetically without considering conduction sequence. Confusing peak V_m with RMS values or misapplying scaling. Final Answer: (2 V_m / π)

Question 20

Three-phase full-wave AC voltage regulator (star-connected resistive load) A 3-phase full-wave regulator (thyristor AC voltage controller) feeds a star-connected purely resistive load from a 400 V line-to-line, 50 Hz supply. If the firing angle is s…

Accepted Answer

Introduction / Context: Three-phase full-wave AC voltage regulators use phase-controlled thyristors to chop portions of the input sinusoid, thereby reducing the RMS output voltage to the load. Understanding how the firing angle near 180° limits the conduction interval helps predict the delivered voltage, especially for resistive star-connected loads. Given Data / Assumptions: Three-phase controller, star-connected purely resistive load. Input line-to-line RMS voltage = 400 V, 50 Hz. Firing angle α = 160°. Ideal, symmetrical firing and no commutation overlap assumed for conceptual calculation. Concept / Approach: In a 3-phase controller, each phase pair conducts when its line-to-line voltage is positive and its corresponding thyristors have been fired. As the firing angle α increases, the effective conduction window shrinks. Beyond about 150°, conduction is highly discontinuous and the effective RMS output collapses toward zero for purely resistive loads because there is almost no time for significant current to flow before the line voltage changes polarity. Step-by-Step Solution: At α = 160°, conduction is delayed to a point where the instantaneous line-to-line voltage has already decayed close to zero by the time a device is fired.For a resistive load, current follows voltage instantaneously; extremely short, low-amplitude conduction segments result.The cumulative RMS contribution of such tiny segments is negligible → practical output approaches zero. Verification / Alternative check: Rules of thumb and waveforms of 3-phase AC regulators show that beyond α ≈ 150°, output becomes vanishingly small for R-loads; at α very near 180°, it is effectively zero. Why Other Options Are Wrong: 400 V and about 250 V correspond to little or no control (α near 0°). About 100 V or about 20 V still suggest material conduction which is not the case at α = 160° for an R-load in a 3-phase scheme. Common Pitfalls: Confusing single-phase behavior with three-phase conduction windows; forgetting that with resistive loads, late firing severely truncates current flow. Also, neglecting that RMS values depend on the square of the voltage over the conduction interval, which becomes tiny here. Final Answer: zero

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