TTL vs. CMOS propagation delay Evaluate the claim: “The major advantage of TTL logic circuits over CMOS is lower propagation delay.”

Introduction / Context:
In classic textbook comparisons, TTL (especially Schottky variants like LS, AS, F) offered significantly shorter propagation delays than early CMOS 4000-series devices, whose strengths were ultra-low static power and very wide supply ranges rather than speed. Although modern CMOS families can be extremely fast, the historical “TTL vs. early CMOS” comparison underpins this statement.

Given Data / Assumptions:

• Compare representative families at 5 V: TTL LS/AS/F vs. CMOS 4000-series (CD4xxx).
• Early CMOS 4000-series had longer t_pd but consumed orders of magnitude less static power.
• We interpret the statement in the classic educational context where it typically appears.

Concept / Approach:
Propagation delay is influenced by device physics and circuit topology. Schottky-clamped TTL avoids deep saturation, reducing storage delay; correspondingly, early CMOS prioritized low power and high noise immunity over raw speed. Hence, TTL’s major advantage in that era was lower propagation delay.

Step-by-Step Solution:

Verification / Alternative check:
Modern CMOS (HC/HCT, AHC, LVC) can outperform TTL, but the question compares broad families historically, not best-of-breed modern CMOS versus old TTL.

Why Other Options Are Wrong:
“Incorrect” ignores the standard historical comparison. “True only for the 4000-series CMOS” is close but over-qualifies; the educational point is general. “True only above 10 V” is irrelevant to TTL-CMOS comparisons.

Common Pitfalls:
Extrapolating the statement to all modern CMOS, which can be faster than TTL; context matters.

Final Answer:
Correct