Curioustab
Aptitude
General Knowledge
Verbal Reasoning
Computer Science
Interview
Aptitude
General Knowledge
Verbal Reasoning
Computer Science
Interview
Flip-Flops Questions
The duty cycle of a 555 timer configured as a basic astable multivibrator is controlled by ________.
When both inputs of a J-K pulse-triggered FF are high and the clock cycles, the output will ________.
The J-K flip-flop is a standard building block of clocked (sequential) logic circuits known as a ________.
An astable multivibrator is a circuit that ________.
If data is brought into the J terminal and its complement to the K terminal, a J-K flip-flop operates as a(n) ________.
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