Difficulty: Easy
Correct Answer: capacitors
Explanation:
Introduction / Context:
DRAM technology is based on storing electrical charge that leaks over time, which is why refresh is required. Identifying the core storage element clarifies differences from SRAM and nonvolatile memories.
Given Data / Assumptions:
Concept / Approach:
A DRAM bit cell consists of one access transistor and one capacitor. A logic 1 is represented by stored charge; a logic 0 by the absence of charge (or vice versa depending on convention). Because charge leaks, periodic refresh restores the correct level. None of the other mechanisms listed match DRAM’s underlying physics.
Step-by-Step Solution:
Verification / Alternative check:
Cell schematics and timing diagrams in memory textbooks show the 1T1C DRAM cell and explain the need for refresh.
Why Other Options Are Wrong:
Common Pitfalls:
Assuming DRAM retains data indefinitely; forgetting that reads are destructive and require restore operations.
Final Answer:
capacitors
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