The circuit given below fails to function; the inputs are checked with a logic probe and the following indications are obtained: CLK, J1, J2, J3, K1, K2, and K3 are pulsing. Q and are HIGH. and PRE are LOW. What could be causing the problem?

• There is no problem.
• The clock should be held HIGH.
• The PRE is stuck LOW.
• The CLR is stuck HIGH.