Difficulty: Easy
Correct Answer: Correct
Explanation:
Introduction / Context:Tracking (a.k.a. servo or up/down) ADCs adjust their output code one LSB at a time to follow the input. Understanding their steady-state behavior clarifies why they are simple but relatively slow to acquire large step changes and why they show code toggling even for constant inputs near decision thresholds.
Given Data / Assumptions:
Concept / Approach:In a tracking ADC, a comparator evaluates (Vin − Vdac). If positive, the logic increments the code; if negative, it decrements. With a constant Vin not exactly at a quantization center, the loop hunts between the nearest two adjacent codes. Even with a centered value, thermal/comparator noise usually produces occasional toggling (limit-cycle behavior). Hence, the digital output “oscillates” by ±1 LSB around the best representation.
Step-by-Step Solution:
Initialize code near the expected value.Comparator drives increment/decrement decisions each cycle.For steady Vin, the loop converges to the two bounding codes.Resulting output shows alternating codes (dither) within ±1 LSB.Verification / Alternative check:Loop analysis reveals a limit cycle when the error cannot be reduced below 0.5 LSB. Simulations or bench tests show a square-wave-like flipping between two codes for DC inputs near thresholds.
Why Other Options Are Wrong:
Common Pitfalls:Expecting rock-solid constant codes from tracking ADCs; overlooking the need for output averaging or hysteresis to stabilize readouts.
Final Answer:Correct
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