Difficulty: Easy
Correct Answer: Correct
Explanation:
Introduction / Context:Settling time is the interval a DAC output needs to reach and remain within a specified error band after a code transition. Architecture significantly affects it. Current-steering DACs (current-output) often switch matched current sources directly and hand the summing to a transimpedance node, while voltage-output DACs integrate an internal amplifier that must slew and settle, adding dynamics that can slow the response.
Given Data / Assumptions:
Concept / Approach:Current-output (current-steering) DACs use fast switching of current cells; the external I/V converter can be optimized for bandwidth. Voltage-output DACs include an internal amplifier that must slew across step changes and recover from glitches, typically producing longer worst-case settling times. Consequently, for high-speed applications (communications, waveform synthesis), current-output DACs are preferred when fast settling and wide bandwidth are priorities.
Step-by-Step Solution:
Consider architecture: switching currents vs. slewing an internal op-amp.Assess dynamics: current steering minimizes internal settling bottlenecks.Conclude: current-output DACs generally settle faster.Verification / Alternative check:Datasheets commonly show sub-100 ns settling for current-output devices of a given resolution, whereas comparable voltage-output devices list longer settling times due to amplifier dynamics and output buffer stabilization.
Why Other Options Are Wrong:
“Incorrect”: Contradicts widely observed architectural behavior.“Only true for 16-bit” / “below 1 kHz”: Not tied to a single resolution or rate; it is architectural.“Depends solely on reference”: Reference design matters but is not the sole determinant.Common Pitfalls:Ignoring the external I/V op-amp requirements for current-output DACs; a poor I/V stage can negate the advantage.
Final Answer:Correct
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