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Programmable Logic Device problems

  • 1. The MAX+PLUS II compiler will automatically program a macrocell to borrow up to six product terms from each of three adjacent macrocells in the same LAB.

  • Options
  • A. True
  • B. False
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  • 2. VHDL code is divided into three sections: library declaration, entity declaration, and architecture body.

  • Options
  • A. True
  • B. False
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  • 3. The JTAG signals are named TDI, TDO, TMS, and TCK.

  • Options
  • A. True
  • B. False
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  • 4. A GAL is a programmable/reprogrammable PAL.

  • Options
  • A. True
  • B. False
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  • 5. A PAL consists of an array of fixed AND gates that are connected to a programmable array of OR gates.

  • Options
  • A. True
  • B. False
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  • 6. Schematic capture is a process performed by PLD software.

  • Options
  • A. True
  • B. False
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  • 7. An expensive form of programmable logic is SPLD.

  • Options
  • A. True
  • B. False
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  • 8. The GAL16V8 has eight dedicated input pins.

  • Options
  • A. True
  • B. False
    • Discuss
  • 9. PLDs did not gain widespread acceptance with digital until the mid-1980s, when a device called a PAL was introduced.

  • Options
  • A. True
  • B. False
    • Discuss
  • 10. In the FLEX10K device, the LE can produce two outputs to drive local (LAB) and global (fast track) interconnects on the chip.

  • Options
  • A. True
  • B. False
    • Discuss

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