programmable-logic-device digital-electronics question and answers -Page 12

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Programmable Logic Device problems

1. The major structures of the MAX7000S are the logic array block (LAB) and the programmable intermediate array (PIA).
Options
A. True
B. False

Correct Answer: False

2. In the OLMC of a GAL16V8, the FMUX selects the signal that is fed into the input matrix.
Options
A. True
B. False

Correct Answer: True

3. Most PAL devices have a tristate buffer driving the input pins.
Options
A. True
B. False

Correct Answer: False

4. The FPLA has a programmable AND array and a programmable OR array.
Options
A. True
B. False

Correct Answer: True

5. The GAL22V10 has 12 outputs pins and 10 input pins.
Options
A. True
B. False

Correct Answer: False

6. The programming technologies that are used in CPLD devices are all nonvolatile.
Options
A. True
B. False

Correct Answer: True

7. A PAL uses a programmable OR array followed by a fixed AND array.
Options
A. True
B. False

Correct Answer: False

8. The hard core portions of FPGAs are reprogrammable in the field.
Options
A. True
B. False

Correct Answer: False

9. The major digital system categories include Boolean logic, ASICs, and microprocessor/DSP devices.
Options
A. True
B. False

Correct Answer: False

10. The Boolean expression (A + B)(C + D) is an example of ________.
Options
A. LAB
B. LUT
C. SOP
D. POS

Correct Answer: POS

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