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3. What causes low-power Schottky TTL to use less power than the 74XX series TTL?
Options
A. The Schottky-clamped transistor
B. Nothing. The 74XX series uses less power.
C. A larger value resistor
D. Using NAND gates

4. Which of the following statements apply to CMOS devices?
Options
A. The devices should not be inserted into circuits with the power on.
B. All tools, test equipment, and metal workbenches should be tied to earth ground.
C. The devices should be stored and shipped in antistatic tubes or conductive foam.
D. All of the above.

5. Whenever a totem-pole TTL output goes from LOW to HIGH, a high-amplitude current spike is drawn from the V_cc supply. How is this effect corrected to a digital circuit?
Options
A. By connecting a radio-frequency capacitor from V_cc to ground.
B. By using a switching power supply
C. By connecting a capacitor from V_out to ground
D. By connecting a large resistor from V_cc to V_out

6. Why is the fan-out of CMOS gates frequency dependent?
Options
A. Each CMOS input gate has a specific propagation time and this limits the number of different gates that can be connected to the output of a CMOS gate.
B. When the frequency reaches the critical value, the gate will only be capable of delivering 70% of the normal output voltage and consequently the output power will be one-half of normal; this defines the upper operating frequency.
C. The higher the number of gates attached to the output, the more frequently they will have to be serviced, thus reducing the frequency at which each will be serviced with an input signal.
D. The input gates of the FETs are predominantly capacitive, and as the signal frequency increases the capacitive loading also increases, thereby limiting the number of loads that may be attached to the output of the driving gate.

8. What does ECL stand for?
Options
A. It stands for electron-coupled logic; all of the devices used within the gates are N-type transistors.
B. It stands for emitter-coupled logic; all of the inputs are coupled into the device through the emitters of the input transistors.
C. It stands for emitter-coupled logic; all of the emitters of the input transistors are connected together and each transistor functions as an emitter follower.
D. It stands for energy-coupled logic; the input energy is amplified by the input transistors and allows the device to deliver higher output currents.

10. What type of logic circuit is shown below and what logic function is being performed?
Options
A. It is an NMOS AND gate.
B. It is a CMOS AND gate.
C. It is a CMOS NOR gate.
D. It is a PMOS NAND gate.

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