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Programmable Logic Device problems


  • 1. Xilinx software uses triangular symbols called buffers to define pins as input or output.

  • Options
  • A. True
  • B. False
  • Discuss
  • 2. The architecture of a PAL differs slightly from that of a PROM.

  • Options
  • A. True
  • B. False
  • Discuss
  • 3. The Altera FLEX10K family uses a look-up table (LUT) architecture.

  • Options
  • A. True
  • B. False
  • Discuss
  • 4. Generally, PLDs can be described as being one of four different types.

  • Options
  • A. True
  • B. False
  • Discuss
  • 5. Altera Corporation and Xilinx Corporation are the two leading PLD manufacturers.

  • Options
  • A. True
  • B. False
  • Discuss
  • 6. The Altera UPIX educational development board contains an EP10K60 device in a 280-pin package.

  • Options
  • A. True
  • B. False
  • Discuss
  • 7. The GAL16V8 has 32 input variables.

  • Options
  • A. True
  • B. False
  • Discuss
  • 8. CPLDs and FPGAs are often referred to as high-capacity programmable logic devices (HCPLDs).

  • Options
  • A. True
  • B. False
  • Discuss
  • 9. The four input-only pins found on devices in the MAX7000S family can be configured as specific high-speed control signals or as general user inputs.

  • Options
  • A. True
  • B. False
  • Discuss
  • 10. Based on the high-density architecture of logic cells, FLEX10K devices are generally classified as HCPLDs.

  • Options
  • A. True
  • B. False
  • Discuss

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