2. Why is the operating frequency for CMOS devices critical for determining power dissipation?
Options
A. At low frequencies, power dissipation increases.
B. At high frequencies, the gate will only be able to deliver 70.7 % of rated power.
C. At high frequencies, charging and discharging the gate capacitance will draw a heavy current from the power supply and thus increase power dissipation.
D. At high frequencies, the gate will only be able to deliver 70.7 % of rated power and charging and discharging the gate capacitance will draw a heavy current from the power supply and thus increase power dissipation.
Correct Answer: At high frequencies, charging and discharging the gate capacitance will draw a heavy current from the power supply and thus increase power dissipation.
3. Which of the following logic families has the shortest propagation delay?
A. represent MOSFET devices utilizing either P-channel or N-channel devices exclusively within a given gate
B. are enhancement-type CMOS devices used to produce a series of high-speed logic known as 74HC
C. represent positive and negative MOS-type devices, which can be operated from differential power supplies and are compatible with operational amplifiers
Correct Answer: represent MOSFET devices utilizing either P-channel or N-channel devices exclusively within a given gate
5. The problem of the VOH(min) of a TTL IC being too low to drive a CMOS circuit and meet the CMOS requirement of VIH(min) is usually easily overcome by:
Options
A. adding a fixed voltage-divider bias resistive network at the output of the TTL device
B. avoiding this condition and only using TTL to drive TTL
C. adding an external pull-down resistor to ground