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Flip-Flops problems


  • 1. A 555 operating as a monostable multivibrator has a C1 = 100 µF. Determine R1 for a pulse width of 500 ms.

  • Options
  • A. 45 Ω
  • B. 455Ω
  • C. 4.5 kΩ
  • D. 455 kΩ
  • Discuss
  • 2. As a general rule for stable flip-flop triggering, the clock pulse rise and fall times must be:

  • Options
  • A. very long.
  • B. very short.
  • C. at a maximum value to enable the input control signals to stabilize.
  • D. of no consequence as long as the levels are within the determinate range of value.
  • Discuss
  • 3. Propagation delay time, tPLH, is measured from the ________.

  • Options
  • A. triggering edge of the clock pulse to the LOW-to-HIGH transition of the output
  • B. triggering edge of the clock pulse to the HIGH-to-LOW transition of the output
  • C. preset input to the LOW-to-HIGH transition of the output
  • D. clear input to the HIGH-to-LOW transition of the output
  • Discuss
  • 4. The output pulse width of a 555 monostable circuit with R1 = 4.7 kΩ and C1 = 47 µF is ________.

  • Options
  • A. 24 s
  • B. 24 ms
  • C. 243 ms
  • D. 243 µs
  • Discuss
  • 5. What does the triangle on the clock input of a J-K flip-flop mean?

  • Options
  • A. level enabled
  • B. edge-triggered
  • Discuss
  • 6. What is another name for a one-shot?

  • Options
  • A. Monostable
  • B. Multivibrator
  • C. Bistable
  • D. Astable
  • Discuss
  • 7. An invalid condition in the operation of an active-HIGH input S-R latch occurs when ________.

  • Options
  • A. HIGHs are applied simultaneously to both inputs S and R
  • B. LOWs are applied simultaneously to both inputs S and R
  • C. a LOW is applied to the S input while a HIGH is applied to the R input
  • D. a HIGH is applied to the S input while a LOW is applied to the R input
  • Discuss
  • 8. The timing network that sets the output frequency of a 555 astable circuit contains ________.

  • Options
  • A. three external resistors are used
  • B. two external resistors and an external capacitor are used
  • C. an external resistor and two external capacitors are used
  • D. no external resistor or capacitor is required
  • Discuss
  • 9. If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be ________.

  • Options
  • A. SET
  • B. RESET
  • C. clear
  • D. invalid
  • Discuss
  • 10. What is the difference between the enable input of the 7475 and the clock input of the 7474?

  • Options
  • A. The 7475 is edge-triggered.
  • B. The 7474 is edge-triggered.
  • Discuss

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