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CuriousTab

Counters problems


  • 1. For a multistage counter to be truly synchronous, the ________ of each stage must be connected to ________.

  • Options
  • A. Cp, the same clock input line
  • B. CE, the same clock input line
  • C. , the terminal count output
  • D. , both clock input lines
  • Discuss
  • 2. A MOD-12 and a MOD-10 counter are cascaded. Determine the output frequency if the input clock frequency is 60 MHz.

  • Options
  • A. 500 kHz
  • B. 1,500 kHz
  • C. 6 MHz
  • D. 5 MHz
  • Discuss
  • 3. A ripple counter's speed is limited by the propagation delay of:

  • Options
  • A. each flip-flop
  • B. all flip-flops and gates
  • C. the flip-flops only with gates
  • D. only circuit gates
  • Discuss
  • 4. In a seven-segment LED display, the BCD must be decoded into a format that can be used to drive the decimal numeric display.

  • Options
  • A. True
  • B. False
  • Discuss
  • 5. Synchronous binary counters can only be used for the application of timing of digital systems.

  • Options
  • A. True
  • B. False
  • Discuss
  • 6. To cascade is to connect in parallel.

  • Options
  • A. True
  • B. False
  • Discuss
  • 7. Shift register counters use logic functions to reset the registers when the desired count is reached.

  • Options
  • A. True
  • B. False
  • Discuss
  • 8. Once an up/down counter begins its count sequence, it cannot be reversed.

  • Options
  • A. True
  • B. False
  • Discuss
  • 9. An effective time delay device can be constructed by using the propagation delay characteristic of parallel shift registers.

  • Options
  • A. True
  • B. False
  • Discuss
  • 10. Bidirectional shift registers can shift data either right or left.

  • Options
  • A. True
  • B. False
  • Discuss

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