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  • Question

  • An effective time delay device can be constructed by using the propagation delay characteristic of parallel shift registers.


  • Options
  • A. True
  • B. False

  • Correct Answer
  • False 

    • Counters problems

    Search Results

    • 1. Once an up/down counter begins its count sequence, it cannot be reversed.

    • Options
    • A. True
    • B. False
      • Discuss
    • 2. Shift register counters use logic functions to reset the registers when the desired count is reached.

    • Options
    • A. True
    • B. False
      • Discuss
    • 3. To cascade is to connect in parallel.

    • Options
    • A. True
    • B. False
      • Discuss
    • 4. Synchronous binary counters can only be used for the application of timing of digital systems.

    • Options
    • A. True
    • B. False
      • Discuss
    • 5. In a seven-segment LED display, the BCD must be decoded into a format that can be used to drive the decimal numeric display.

    • Options
    • A. True
    • B. False
      • Discuss
    • 6. Bidirectional shift registers can shift data either right or left.

    • Options
    • A. True
    • B. False
      • Discuss
    • 7. Parallel in/parallel out registers have parallel input and output busses.

    • Options
    • A. True
    • B. False
      • Discuss
    • 8. A glitch is a short pulse resulting in an undesired result in a digital circuit.

    • Options
    • A. True
    • B. False
      • Discuss
    • 9. The term synchronous refers to events that do not occur at the same time.

    • Options
    • A. True
    • B. False
      • Discuss
    • 10. The modulus of a counter is the actual number of states in its sequence.

    • Options
    • A. True
    • B. False
      • Discuss

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