Question 1

PC/DOS Utilities: Match Command or Tool to Its Function  List I A. CLP (screen-clearing command, as referenced here) B. MSAV C. FDISK D. VER  List II  Displays DOS version in use  Partitions a hard disk  Anti-virus program  Clears the screen

Accepted Answer

Introduction / Context: Classic DOS-era utilities remain foundational knowledge for system basics. This mapping reinforces what common commands and tools do: screen handling, virus scanning, disk partitioning, and version reporting. Given Data / Assumptions: CLP is taken here to denote the screen-clearing command used in DOS contexts (historically written as CLS; the question uses CLP, which we treat as a local shorthand). MSAV is Microsoft's anti-virus utility. FDISK is the partitioning tool for hard disks. VER prints the DOS (or command interpreter) version. Concept / Approach: Associate each tool with its primary function. The focus is on standard textbook roles rather than switches or advanced flags. Step-by-Step Solution: A (CLP) → clear screen operation ⇒ 4.B (MSAV) → anti-virus utility ⇒ 3.C (FDISK) → disk partition creation/management ⇒ 2.D (VER) → display version information ⇒ 1. Verification / Alternative check: Try typical command invocations: CLS clears the console; VER prints a version banner; FDISK launches the partition menu; MSAV scans for known virus signatures in its era. Why Other Options Are Wrong: Swapping VER with FDISK or MSAV misstates their capabilities; pairing CLP/CLS with anything other than screen clearing contradicts standard documentation. Common Pitfalls: Confusing CLP with CLS; also, assuming FDISK formats disks (formatting is a separate step after partitioning). Final Answer: A-4, B-3, C-2, D-1

Question 2

8085 Addressing Modes: Match Each Mode to an Example Instruction  List I (Addressing Mode) A. Direct addressing B. Register addressing C. Register indirect addressing D. Immediate addressing  List II (Example Instruction)  MOV A, M  MOV C, A  LDA 7 …

Accepted Answer

Introduction / Context: Understanding addressing modes in the 8085 microprocessor clarifies how operands are fetched: directly from a memory address, from a register, via a register pair pointer, or given immediately as part of the instruction. This knowledge is critical for efficient assembly programming and debugging. Given Data / Assumptions: Direct addressing uses a 16-bit address field inside the instruction. Register addressing references a CPU register operand. Register indirect addressing uses a register pair (typically HL) as a memory pointer (M pseudo-register). Immediate addressing embeds the operand value in the instruction encoding. Concept / Approach: Map each example instruction to its addressing mode based on operand form. Note: In standard 8085 syntax, both LDA addr and STA addr are direct-addressing examples; in this item set, LDA 7 is used to represent an operand supplied with the instruction (treated here as immediate-style for uniqueness), while STA FFC clearly demonstrates direct addressing as well. Step-by-Step Solution: A (Direct addressing) → STA FFC writes the accumulator to an absolute memory address ⇒ 4.B (Register addressing) → MOV C, A copies between registers ⇒ 2.C (Register indirect) → MOV A, M accesses memory via HL pointer ⇒ 1.D (Immediate addressing) → LDA 7 is taken here as an example with an operand value supplied in the instruction field ⇒ 3. Verification / Alternative check: Assembler references: M stands for memory addressed by HL, confirming register-indirect; MOV reg, reg is register addressing; STA/LDA with explicit addresses are direct. The provided pairing ensures one-to-one mapping among the given choices. Why Other Options Are Wrong: Pairings that put MOV A, M under direct addressing ignore the indirection via HL; swapping STA with immediate contradicts the presence of a 16-bit address operand. Common Pitfalls: Confusing immediate with direct addressing; remember, immediate encodes the data value, whereas direct encodes a memory address. Also, M is not a physical register; it dereferences HL. Final Answer: A-4, B-2, C-1, D-3

Question 3

Superheterodyne Receiver Blocks: Match Each Stage to Its Role  List I (Stage) A. RF amplifier B. Loudspeaker C. Demodulator D. IF amplifier  List II (Function)  Amplifies received carrier along with its sidebands (preselects front-end)  Provides aco…

Accepted Answer

Introduction / Context: Superheterodyne receivers divide processing into RF front-end filtering/amplification, frequency conversion to a fixed IF, selective amplification, and baseband detection, finally driving an audio transducer. Knowing each block's role is foundational for radio design and troubleshooting. Given Data / Assumptions: RF amplifier precedes the mixer, improving sensitivity and selectivity. IF amplifier operates at a fixed intermediate frequency with narrowband selectivity. Demodulator recovers the audio/baseband (AF) from IF. Loudspeaker converts electrical AF to sound. Concept / Approach: Assign each stage to the description that best matches its standard function within a superhet architecture. Step-by-Step Solution: A (RF amplifier) → boosts incoming RF signal and rejects out-of-band interference ⇒ 1.B (Loudspeaker) → transduces AF signal to acoustic output ⇒ 2.C (Demodulator) → accepts IF and outputs AF (AM/FM/SSB detector depending on design) ⇒ 3.D (IF amplifier) → provides high, fixed-frequency gain and selectivity ⇒ 4. Verification / Alternative check: Standard block diagrams of AM/FM superhet receivers confirm: antenna → RF amp → mixer/LO → IF filter/amp → detector → AF amp → loudspeaker. Why Other Options Are Wrong: Swapped mappings would misplace functions (e.g., a loudspeaker cannot amplify IF, and an IF amplifier does not produce audio). RF amplification must precede conversion to preserve signal quality. Common Pitfalls: Confusing RF and IF roles, or assuming the demodulator operates directly at RF; while direct-conversion radios exist, this question clearly targets superheterodyne architecture. Final Answer: A-1, B-2, C-3, D-4

Question 4

Oscillators and feedback amplifiers — match each item to its typical frequency range or impedance trait  List I (Circuit) A. Wien bridge oscillator B. Voltage–shunt feedback amplifier C. Crystal oscillator D. Current–shunt feedback amplifier  List I…

Accepted Answer

Introduction / Context: This matching problem checks recognition of classic oscillator types and feedback topologies against their hallmark operating ranges and impedance properties. Correctly pairing these helps with quick architecture selection in analog and RF design. Given Data / Assumptions: Wien bridge oscillators are widely used for low-distortion audio-frequency generation. Voltage–shunt feedback takes a voltage sample from the output and mixes it in shunt at the input, tending to reduce output impedance. Crystal oscillators exploit quartz resonance and are commonly used at RF and high-stability HF/VHF. Current–shunt feedback samples output current and mixes in shunt at the input; current sampling raises output impedance. Concept / Approach: Map each item to the most engineer-relevant trait: Wien bridge → audio range; crystal → RF range; voltage–shunt feedback → low Z_out; current–shunt feedback → high Z_out due to current sampling (transresistance behavior). Step-by-Step Solution: Pair A (Wien bridge) → audio range → 3.Pair B (Voltage–shunt) → low output impedance → 1.Pair C (Crystal oscillator) → RF range → 2.Pair D (Current–shunt) → high output impedance → 5. Verification / Alternative check: Feedback theory: shunt mixing at the input lowers input impedance; series mixing raises it. Current sampling (series at output) increases output impedance; voltage sampling (shunt at output) decreases it. Textbook oscillator chapters place Wien bridges in AF labs and crystals in RF frequency control. Why Other Options Are Wrong: Swapping RF/AF ranges contradicts standard usage. Assigning high output impedance to voltage-shunt conflicts with voltage sampling at the output. Setting low output impedance for current-shunt mismatches current sampling behavior. Common Pitfalls: Confusing “series/shunt at input” with “voltage/current sampling at output.” Remember: voltage sampling → low Z_out; current sampling → high Z_out. Final Answer: A-3, B-1, C-2, D-5

Question 5

8085 register-pair encoding — match bit patterns to register pairs  List I (Bit pattern) A. 00 B. 01 C. 10 D. 11  List II (Register pair) 1. SP 2. B–C 3. D–E 4. H–L

Accepted Answer

Introduction / Context: Many 8085 instructions encode a register pair with a 2-bit field (rp). Knowing this mapping is essential for decoding opcodes (e.g., LXI rp, DAD rp, INX rp) and writing assemblers/disassemblers. Given Data / Assumptions: We use the conventional 8085 mapping for register pairs in instructions that accept rp. The four register pairs are B–C, D–E, H–L, and SP. Concept / Approach: Intel’s encoding assigns 00→BC, 01→DE, 10→HL, and 11→SP for the rp field. We simply pair each 2-bit code with its register pair. Step-by-Step Solution: Map 00 → B–C.Map 01 → D–E.Map 10 → H–L.Map 11 → SP. Verification / Alternative check: Check the opcode table: e.g., LXI rp uses opcodes 00xx1001 with rp in bits 5–4; decoding examples confirm the mapping above. Why Other Options Are Wrong: Any option that swaps SP with HL or DE with BC would misdecode popular instructions like DAD H or INX D. Common Pitfalls: Confusing the rp mapping with the r (3-bit) single-register field used in MOV/MVI/ADD; they are different encodings. Final Answer: A-2, B-3, C-4, D-1

Question 6

Transducers and measured quantities — match each sensor to what it measures most directly  List I (Transducer) A. LVDT (Linear Variable Differential Transformer) B. Bourdon tube gauge C. Strain gauge (with bridge) D. Thermistor  List II (Quantity me…

Accepted Answer

Introduction / Context: Instrumentation design begins with selecting the right transducer for the measurand. This question aligns common sensors with the primary physical quantity they measure or are routinely used to infer in engineering practice. Given Data / Assumptions: LVDT outputs a differential voltage proportional to core displacement. Bourdon gauges convert pressure to tube deflection and pointer motion. Strain gauges sense strain; with Young’s modulus they infer stress. Thermistors change resistance with temperature. Concept / Approach: Match each device to the measurand most directly or most commonly associated in calibrated systems: LVDT → displacement; Bourdon tube → pressure; strain gauge bridges → strain which maps to stress; thermistor → temperature. Step-by-Step Solution: A (LVDT) → 3 (displacement).B (Bourdon) → 1 (pressure).C (Strain gauge) → 4 (stress via strain and E).D (Thermistor) → 2 (temperature). Verification / Alternative check: Manufacturer datasheets list LVDT linear ranges in mm; Bourdon gauges are graded in pressure units; strain gauge applications include stress analysis; thermistor R–T curves enable thermometer design. Why Other Options Are Wrong: Pairings that put thermistors with pressure or LVDTs with temperature contradict sensor physics. Strain gauges do not directly measure temperature or pressure; they measure strain, used to compute stress. Common Pitfalls: Assuming the gauge factor device reads “force”; proper signal conditioning and mechanical design are required to relate strain to stress/force. Final Answer: A-3, B-1, C-4, D-2

Question 7

ADC architectures — match each converter type to its hallmark requirement or benefit  List I (ADC type) A. Flash converter ADC B. Dual-slope ADC C. Successive-approximation ADC  List II (Characteristic) 1. Requires conversion time of only a few micr…

Accepted Answer

Introduction / Context: Different ADC topologies trade speed, accuracy, complexity, and noise immunity. Pairing each with its defining trait enables informed converter selection for embedded and instrumentation systems. Given Data / Assumptions: Flash ADC: parallel comparators and a resistor ladder. Dual-slope ADC: integrates input then reference, excellent at rejecting line hum. SAR ADC: binary search using DAC + comparator under SAR logic. Concept / Approach: Flash converters are the fastest but require many comparators → complex hardware. Dual-slope inherently averages the signal over an integer number of mains cycles → strong power-supply hum rejection. SAR uses an internal DAC to refine the trial code each bit time → requires DAC in its feedback path. Step-by-Step Solution: A (Flash) → 4 (requires complex hardware).B (Dual-slope) → 3 (minimizes power-supply interference).C (SAR) → 2 (requires DAC in feedback). Verification / Alternative check: Compare converter block diagrams: flash shows N-bit wide comparator array; SAR blocks include DAC; dual-slope timing diagrams integrate over T_int and T_ref to cancel periodic interference. Why Other Options Are Wrong: “Tracking ADC” describes a different architecture (up/down counter type), not SAR or flash. Assigning “few microseconds” generically is ambiguous; many SARs are microseconds too, but the option set uses structural traits. Common Pitfalls: Confusing dual-slope with delta-sigma; both integrate, but delta-sigma uses oversampling and noise-shaping. Final Answer: A-4, B-3, C-2

Question 8

C operators — match operator to its description  List I (Operator) A. ?: (ternary) B. [ ] (subscript) C. % (percent)  List II (Description) 1. Modulus (remainder) 2. Array expression / element access 3. Conditional (if-else in expression form)

Accepted Answer

Introduction / Context: Operator literacy is central to reading C code quickly and safely. This match tests three frequently used operators that influence control flow, indexing, and arithmetic results. Given Data / Assumptions: Standard ISO C semantics. Integer operands for modulus. Zero-based array indexing. Concept / Approach: The ternary operator implements an inline conditional; the subscript operator indexes arrays/pointers; and the percent sign performs remainder arithmetic on integers. We map each symbol to its canonical description from the C grammar and standard library usage. Step-by-Step Solution: A (?:) → conditional expression → 3.B ([ ]) → array element access / pointer arithmetic sugar → 2.C (%) → modulus (remainder) operator → 1. Verification / Alternative check: Compile small snippets: int x = cond ? a : b; selects between values; arr[i] is *(arr + i); 7 % 3 yields 1 in C. Why Other Options Are Wrong: Swapping array access and modulus descriptions would misrepresent syntax and behavior. Placing “conditional” on [] or % is semantically incorrect. Common Pitfalls: Assuming % is a true mathematical modulus for negatives—C defines remainder with implementation-defined sign rules in older standards; modern C17 specifies truncation toward zero. Final Answer: A-3, B-2, C-1

Question 9

Transmission media and their dominant field modes — match each line/guide to the mode it supports  List I (Transmission system) A. Rectangular waveguide B. Circular waveguide C. Coaxial line D. Microstrip line  List II (Mode type) 1. TE/TM (no true …

Accepted Answer

Introduction / Context: Understanding which field modes a medium supports is crucial for dispersion, cutoff, and connector design. Hollow metallic waveguides differ fundamentally from transmission lines such as coax and microstrip. Given Data / Assumptions: Hollow guides (rectangular, circular) do not support a true TEM mode. Coax supports a pure TEM mode (no cutoff, set by dielectric). Microstrip is an inhomogeneous line and supports quasi-TEM propagation. Concept / Approach: Map hollow guides to TE/TM families; map coax to true TEM; map microstrip to quasi-TEM because the fields partly occupy air and dielectric, causing slight dispersion. Step-by-Step Solution: A (Rectangular waveguide) → 1 (TE/TM).B (Circular waveguide) → 1 (TE/TM).C (Coaxial line) → 2 (TEM).D (Microstrip line) → 3 (quasi-TEM). Verification / Alternative check: Mode charts show TE10 dominance in rectangular guides; coax characteristic impedance formulas assume TEM; microstrip velocity factor varies with effective permittivity, confirming quasi-TEM behavior. Why Other Options Are Wrong: Assigning TEM to hollow guides contradicts boundary-condition proofs. Treating microstrip as pure TEM ignores dielectric inhomogeneity. Common Pitfalls: Assuming “TEM everywhere” because two conductors exist—hollow guides have one conductor and a cavity, forbidding TEM. Final Answer: A-1, B-1, C-2, D-3

Question 10

8085 instruction set functional groups — match each group to its role  List I (8085 group) A. Branch group B. Logic group C. Data transfer group  List II (Function) 1. Compares, rotates, logical operations 2. Moves, loads, stores 3. Initiates condit…

Accepted Answer

Introduction / Context: Grouping instructions by function speeds up learning a CPU. The 8085 groups—branch, logic, and data transfer—cover control flow, bitwise/compare operations, and memory/register moves. Given Data / Assumptions: Branch: JMP, CALL, RET, conditional variants. Logic: ANA, ORA, XRA, CMP, RAL/RAR, CMA, etc. Data transfer: MOV, MVI, LDA/STA, LHLD/SHLD, etc. Concept / Approach: Map each group to its dominant role in programs and microcode: control flow, logic operations, and data movement. Step-by-Step Solution: A (Branch) → 3 (jumps/calls/returns).B (Logic) → 1 (compare/rotate/bitwise).C (Data transfer) → 2 (move/load/store). Verification / Alternative check: Opcode tables list these mnemonics under their respective sections, confirming the mapping. Why Other Options Are Wrong: Swapping logic with data transfer mixes ALU and move operations. Placing branch behavior under data transfer ignores control flow semantics. Common Pitfalls: Assuming arithmetic (ADD/SUB) belongs in the logic group—some texts separate “arithmetic” and “logical”; here the logic group explicitly includes compare/rotate etc. Final Answer: A-3, B-1, C-2

Question 11

Camera pickup tubes — match each tube to its notable feature  List I (Tube) A. Vidicon B. Plumbicon C. Saticon D. Newvicon  List II (Special feature) 1. Highest sensitivity 2. Temperature sensitive 3. Large lag 4. Special target for improved red res…

Accepted Answer

Introduction / Context: Before solid-state image sensors, television cameras employed a range of pickup tubes with distinct target materials and behaviors. Recognizing each tube’s hallmark helps in interpreting legacy system specifications and exam questions on camera technology. Given Data / Assumptions: Vidicon uses a photoconductive target; notable for image lag. Plumbicon (lead-oxide target) offers improved red response compared with earlier tubes. Saticon (Se-As-Te) exhibits temperature sensitivity in operation. Newvicon was developed for higher sensitivity among vidicon-type tubes. Concept / Approach: Associate each tube with the well-known trait emphasized in textbooks: vidicon → lag; plumbicon → better red response; saticon → temperature sensitivity; newvicon → highest sensitivity in its family. Step-by-Step Solution: A (Vidicon) → 3 (large lag).B (Plumbicon) → 4 (special red response).C (Saticon) → 2 (temperature sensitive).D (Newvicon) → 1 (highest sensitivity). Verification / Alternative check: Historic broadcast engineering references compare these tubes’ sensitivity, lag, and spectral response, aligning with the matches above. Why Other Options Are Wrong: Assigning “highest sensitivity” to a plain vidicon conflicts with well-known limitations. Swapping red response and lag traits contradicts materials behavior. Common Pitfalls: Assuming solid-state CMOS/CCD characteristics apply; tubes have different lag and spectral idiosyncrasies. Final Answer: A-3, B-4, C-2, D-1

Question 12

Memory technologies and typical roles in a computer — match each memory type to how it is used  List I (Type of memory) A. DRAM B. SRAM C. Parallel-access registers D. ROM  List II (Used as) 1. Cache memory 2. Main memory 3. BIOS / firmware storage …

Accepted Answer

Introduction / Context: Computer memory hierarchy balances speed, cost, and volatility. This match connects common memory types with their canonical roles in mainstream architectures. Given Data / Assumptions: DRAM is dense and economical but slower → ideal for main memory. SRAM is fast and expensive → used for CPU caches. Parallel-access registers form the CPU’s fastest storage at the pipeline edge. ROM (masked/flash/EEPROM) stores firmware such as BIOS/UEFI. Concept / Approach: Map technology attributes (latency, density, volatility) to architectural placement in the hierarchy: registers at the top (fastest), caches next (SRAM), DRAM as main memory, non-volatile ROM for boot firmware. Step-by-Step Solution: A (DRAM) → 2 (main memory).B (SRAM) → 1 (cache memory).C (Parallel-access registers) → 4 (CPU registers).D (ROM) → 3 (BIOS/firmware). Verification / Alternative check: Processor datasheets list L1/L2/L3 caches as SRAM; motherboard specs list DRAM capacities; firmware images reside in ROM/flash chips. Why Other Options Are Wrong: Swapping DRAM and SRAM contradicts performance-cost trade-offs. Mapping ROM to cache or registers is nonsensical given volatility and speed requirements. Common Pitfalls: Assuming “ROM” always means unchangeable—modern systems use flash-based ROM, but the functional role (firmware) remains. Final Answer: A-2, B-1, C-4, D-3

Question 13

Digital systems and memory-related components — match each item in List I with the most appropriate characteristic in List II.  List I (Component / Technology) A. Static PLA (treated as a static, non-refreshed programmable logic/memory-like array) B…

Accepted Answer

Introduction / Context: This matching question mixes memory-adjacent technologies and logic families. The goal is to associate each item with the dominant characteristic engineers rely on when selecting or describing devices such as CCD arrays, fast logic families, and erasable programmable logic. Given Data / Assumptions: “Static PLA” is taken as a static, non-refreshed programmable array (conceptually like static storage of programmed fuses/EEPROM rather than dynamic DRAM-style refresh). CCD arrays historically served as dense shift-register memories/sensors and can store large amounts of charge information. ECL is a very fast bipolar logic family due to differential emitter-coupled stages that avoid transistor saturation. GAL devices are erasable/programmable (EEPROM-based) and non-volatile. Concept / Approach: Map each technology to the single most distinguishing attribute: static (no refresh) for a static programmable array, density for CCDs, speed for ECL, and erasability/programming for GALs. While GALs are also non-volatile, the pairings here allow only one best match per item. Step-by-Step Solution: A (Static PLA) → does not need refreshing → 4.B (CCD) → large-volume storage capability → 3.C (ECL) → ultra-high speed → 2.D (GAL) → erasable, programmable → 1. Verification / Alternative check: ECL propagation delays are far smaller than TTL/CMOS of the same era; CCD shift registers and image sensors offer very high densities; GALs are reprogrammable via EEPROM cells without removing power; “static” arrangements do not require refresh cycles like DRAM. Why Other Options Are Wrong: Mapping ECL to density or non-volatility ignores its hallmark speed advantage. Assigning CCD to “erasable/programmable” confuses it with EEPROM/flash-based logic arrays. Giving GAL the “no refresh” trait is true but less discriminating than its erasable programmability. Common Pitfalls: Assuming “non-volatile” must be chosen for GAL; remember we need one best match and “erasable, programmable” distinguishes GALs from simple mask-programmed PLAs. Final Answer: A-4, B-3, C-2, D-1

Question 14

C/C++ operators — match each operator symbol (List I) with its correct description (List II). List I (Operator) A. != B. == C. << D. >> List II (Description) 1. Left shift (bitwise) 2. Right shift (bitwise) 3. Equal to (relational) 4. Not equal to…

Accepted Answer

Introduction / Context: Programming interview and exam questions often test whether students can quickly recognize operator semantics. This item pairs common relational and bitwise shift operators with their meanings in C/C++ and many C-like languages. Given Data / Assumptions: Operators appear exactly as typed in source code. We distinguish relational operators (comparisons) from bitwise shifts. No precedence or side-effect subtleties are tested here—only meanings. Concept / Approach: Identify the category first (relational vs. bitwise). Then map symbols to familiar English descriptions: != means “not equal to”; == means “equal to”; << and >> mean left and right bit shifts, respectively. Step-by-Step Solution: A: != → Not equal to → 4.B: == → Equal to → 3.C: << → Left shift → 1.D: >> → Right shift → 2. Verification / Alternative check: Small test: 5 != 6 evaluates true; 5 == 6 evaluates false. For shifts, 1 << 3 equals 8 and 8 >> 2 equals 2, confirming the meanings. Why Other Options Are Wrong: Swapping the relational meanings (== with “not equal” or != with “equal”) inverts logic. Interchanging left and right shifts reverses the direction of bit movement and the power-of-two scaling. Common Pitfalls: Confusing bitwise shifts with stream insertion/extraction operators in C++ iostreams; they reuse the symbols but are overloaded as functions, not fundamental shifts. Final Answer: A-4, B-3, C-1, D-2

Question 15

Semiconductor diodes — match each diode type (List I) with the most accurate statement (List II).  List I (Diode) A. Tunnel diode B. PIN diode C. Zener diode D. Schottky diode  List II (Statement) 1. Also known as a hot-carrier (metal–semiconductor)…

Accepted Answer

Introduction / Context: Different diode structures produce distinct electrical behavior. Recognizing the signature property of each device is essential for RF design, switching supplies, detectors, and protective circuits. Given Data / Assumptions: Tunnel diodes are heavily doped and support quantum tunneling with a negative-resistance region. PIN diodes insert a wide intrinsic region, useful for RF switching/attenuation and photodiodes. Zener diodes operate in breakdown under reverse bias for voltage regulation. Schottky diodes form a metal–semiconductor junction (hot-carrier), yielding low forward drop and fast recovery. Concept / Approach: Match each physical structure to its hallmark behavior: negative resistance (Tunnel), intrinsic region (PIN), reverse-biased breakdown use (Zener), and metal-semiconductor junction (Schottky). Step-by-Step Solution: A (Tunnel) → N-shaped v–i with negative resistance → 4.B (PIN) → intrinsic region → 3.C (Zener) → used with reverse bias for regulation → 2.D (Schottky) → hot-carrier diode → 1. Verification / Alternative check: Datasheets and characteristic curves confirm these properties: e.g., Schottky forward drop ≈ 0.2–0.3 V; tunnel diode shows a peak and valley current; Zeners specify breakdown voltage; PIN diodes specify I-region width and RF parameters. Why Other Options Are Wrong: Interchanging Schottky with Zener or PIN ignores junction physics. Assigning “reverse-bias use” to the tunnel diode confuses its use as a microwave oscillator/amp exploiting negative resistance. Common Pitfalls: Assuming all diodes are P–N; Schottky lacks a P–N junction. Not all breakdown diodes are “Zeners”; avalanche breakdown is also common at higher voltages. Final Answer: A-4, B-3, C-2, D-1

Question 16

Band gaps of elements — match each element (List I) with an approximate energy band gap value at room temperature (List II).  List I (Element) A. C (diamond form) B. Si C. Ge D. Sn E. Pb  List II (Approx. band gap Eg) 1. 7 eV 2. 1.15 eV 3. 0.75 eV 4…

Accepted Answer

Introduction / Context: Band gap values classify materials as insulators, semiconductors, or metals. Knowing typical Eg helps predict conductivity, optical properties, and device applications. Given Data / Assumptions: Values are approximate room-temperature band gaps for the elemental forms listed. Diamond (C) is a wide-bandgap insulator; Si and Ge are classic semiconductors; Sn and Pb behave as semimetal/metal with very small or zero gaps. Concept / Approach: Map each element to a representative Eg: diamond has a very large gap; Si is about 1.1 eV; Ge is below 1 eV; gray tin can be near-semimetal with very small Eg; metals like Pb have Eg ≈ 0. Step-by-Step Solution: A (C) → wide band gap → ~7 eV → 1.B (Si) → ~1.12 eV → 2.C (Ge) → ~0.66–0.75 eV → 3.D (Sn) → ~0.1 eV (very small) → 4.E (Pb) → metal → 0 eV → 5. Verification / Alternative check: Reference semiconductor tables place Si at ~1.12 eV and Ge at ~0.66 eV; diamond is often quoted 5.5–7 eV depending on definition; metals have overlapping bands yielding Eg ≈ 0. Why Other Options Are Wrong: Swapping Si and Ge contradicts well-known semiconductor parameters. Assigning nonzero Eg to Pb contradicts metallic behavior. Placing diamond at a low Eg conflicts with its insulating nature. Common Pitfalls: Confusing indirect vs. direct gaps; the magnitude still orders as diamond > Si > Ge > Sn ≈ Pb. Final Answer: A-1, B-2, C-3, D-4, E-5

Question 17

Microwave sources and structures — match each item in List I with the correct description in List II.  List I A. Reflex klystron B. Dielectric-loaded waveguide C. TWT (traveling-wave tube) D. Multi-cavity klystron  List II 1. High efficiency device …

Accepted Answer

Introduction / Context: This question relates common microwave tubes/structures to their defining roles. Correct associations help in understanding which devices amplify, which oscillate, and which physical structures slow the wave for interaction with an electron beam. Given Data / Assumptions: Reflex klystron is a single-cavity, velocity-modulated tube that operates as an oscillator via an electron beam reflected by a repeller electrode. Dielectric-loaded waveguides and helical structures are used to reduce phase velocity (slow-wave behavior) to maintain interaction with electrons. TWTs are linear-beam slow-wave amplifiers. Multi-cavity klystrons are linear-beam amplifiers renowned for high efficiency compared to many other microwave tubes. Concept / Approach: Map each item to its most characteristic descriptor: reflex klystron → oscillator; TWT → slow-wave device; multi-cavity klystron → high efficiency. The distractor “cross-field device” typically describes magnetrons and crossed-field amplifiers, not linear-beam tubes. Step-by-Step Solution: A (Reflex klystron) → oscillator → 4.B (Dielectric-loaded waveguide) → listed as cross-field device in the options; while not a device per se, we select 3 to satisfy the provided option set.C (TWT) → slow-wave structure interaction → 2.D (Multi-cavity klystron) → high efficiency → 1. Verification / Alternative check: Standard microwave texts classify reflex klystron as an oscillator; TWT uses a helix/slow-wave circuit; and multi-cavity klystron efficiencies can exceed many other tubes. The “cross-field” label more properly applies to magnetrons; this option is a distractor but is chosen as the only remaining mapping under the provided choices. Why Other Options Are Wrong: Mapping a klystron (reflex or multi-cavity) to cross-field is incorrect; they are linear-beam tubes. Assigning oscillator to multi-cavity klystron or TWT contradicts their typical amplifier role. Calling TWT “high efficiency” ignores that klystrons generally achieve higher peak efficiencies. Common Pitfalls: Confusing circuit structures (waveguides) with active tubes; and mixing linear-beam vs. crossed-field device categories. Always check whether the electron motion is primarily along the electric field (linear-beam) or crossed with a magnetic field (cross-field). Final Answer: A-4, B-3, C-2, D-1

Question 18

Digital building blocks: match each component in List I to its primary function in List II. List I (Component) A. Multiplexer B. De-multiplexer C. Shift register D. Encoder List II (Function)  Sequential memory (stores and shifts data)  Converts dec…

Accepted Answer

Introduction / Context: Digital system design relies on a handful of versatile building blocks. This question tests your understanding of what multiplexers, demultiplexers, shift registers, and encoders do in practical circuits such as data routers, buses, and simple memory elements. Given Data / Assumptions: A multiplexer (MUX) selects one of many inputs under control of select lines. A de-multiplexer (DEMUX) routes one input onto one of many outputs under select control. A shift register stores bits and shifts them on clock edges, acting as sequential memory. An encoder maps a 1-of-N active input to a binary code. Concept / Approach: Associate each device with its canonical textbook definition and common use. Think of data direction: MUX is many-to-one (selector), DEMUX is one-to-many (router). A shift register is sequential because it depends on a clock. An encoder reduces many input lines to a smaller set of coded outputs. Step-by-Step Solution: Multiplexer → data selector ⇒ A-3.De-multiplexer → routes single input to many outputs ⇒ B-4.Shift register → sequential memory (stores/shifts) ⇒ C-1.Encoder → converts decimal (1-of-N) to binary ⇒ D-2. Verification / Alternative check: Draw quick block diagrams: a 4-to-1 MUX chooses among four inputs with two select lines; a 1-to-4 DEMUX drives one selected output line; a 4-bit shift register delays/serializes data; a 10-to-4 encoder outputs a 4-bit BCD code from ten inputs. These align perfectly with the mapping. Why Other Options Are Wrong: Pairing MUX with “one-to-many routing” reverses the data direction (that is DEMUX). Calling a shift register a “data selector” ignores its clocked storage/shift behavior. Mapping an encoder to “sequential memory” confuses combinational coding with storage. Common Pitfalls: Confusing encoders with decoders. A decoder takes a binary code and asserts one of many outputs, whereas an encoder does the opposite. Also, do not conflate DEMUX with decoder—although similar structures appear, the functional role differs: DEMUX routes data, decoder generates enables. Final Answer: A-3, B-4, C-1, D-2

Question 19

Transistor emitter-current notation: match symbols to meanings in small-signal analysis. List I (Quantity) A. Total instantaneous value of emitter current B. Quiescent (DC) value of emitter current C. Instantaneous value of the AC component of emitt…

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Introduction / Context: Small-signal transistor notation separates total, DC (quiescent), and AC components. Getting the symbols right is crucial when moving between bias calculations and incremental (signal) analysis for BJTs or FETs. Given Data / Assumptions: Total instantaneous emitter current is the sum of DC and AC components. Uppercase letters typically represent DC quantities; lowercase letters denote instantaneous AC variables; mixed case often denotes RMS values. Standard notation uses iE(t) = IE + ie(t), with Ie commonly reserved for an RMS value of the AC component. Concept / Approach: We match by convention: iE is the instantaneous total, IE is the quiescent DC level, ie is the instantaneous small-signal component, and Ie is the RMS of that AC component. This removes ambiguity when writing KCL/KVL and computing gains or impedances. Step-by-Step Solution: Total instantaneous → iE ⇒ A-2.Quiescent DC → IE ⇒ B-1.Instantaneous AC component → ie ⇒ C-4.RMS of AC component → Ie ⇒ D-3. Verification / Alternative check: Write iE(t) = IE + ie(t). If ie(t) is sinusoidal, its RMS is Ie = Îe / √2. This matches the symbol mapping and standard textbook usage in hybrid-π and h-parameter analyses. Why Other Options Are Wrong: Mapping IE to instantaneous AC contradicts the uppercase DC convention. Using iE for RMS conflates time-varying instantaneous quantities with averaged measures. Assigning Ie to total instantaneous loses the AC/DC separation needed for linearization. Common Pitfalls: Switching between uppercase/lowercase when moving from the “incremental” model back to bias calculations. Keep a clear legend in your solution to avoid misinterpreting gains or impedance formulas. Final Answer: A-2, B-1, C-4, D-3

Question 20

Dominant transverse-electric (TE) modes: match common microwave structures to their dominant TE mode. List I (Structure) A. Rectangular waveguide B. Circular waveguide C. Rectangular cavity resonator List II (Dominant TE mode)  TE101  TE10  TE111  T…

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Introduction / Context: Understanding which mode starts first (dominant mode) in a waveguide or cavity is essential for calculating cutoff frequencies, field patterns, and bandwidth limitations in microwave engineering. Given Data / Assumptions: Rectangular waveguide dimensions are a (broad wall) and b (narrow wall). Circular waveguide diameter determines TE/TM cutoff; the lowest is TE11. Rectangular cavities are closed resonators where indices along x, y, z axes define TE/TM modes. Concept / Approach: The dominant mode is the one with the lowest cutoff frequency. In rectangular waveguides, TE10 has the lowest cutoff (no variation along the narrow dimension). For circular waveguides, TE11 is dominant. In rectangular cavities, a common lowest TE resonance is TE101, corresponding to one half-wave variation along two axes and none along the remaining, depending on cavity dimensions. Step-by-Step Solution: Rectangular waveguide → TE10 ⇒ A-2.Circular waveguide → TE11 ⇒ B-4.Rectangular cavity → TE101 (typical dominant TE) ⇒ C-1. Verification / Alternative check: Cutoff relations: for rectangular guides f_c(TE_mn) ∝ √((m/a)^2 + (n/b)^2), minimizing with m=1, n=0 gives TE10. For circular guides, Bessel-root ordering yields TE11 as the smallest TE cutoff. Cavity resonances follow standing-wave conditions; practical cavity aspect ratios commonly make TE101 the first TE mode. Why Other Options Are Wrong: Assigning TE111 to a rectangular cavity as “dominant” is often higher in frequency due to additional field variations. Mapping TE10 to circular guides is invalid because circular indices differ and TE11 is lower. Common Pitfalls: Confusing propagation modes in open guides with resonance modes in closed cavities; although notation is similar, boundary conditions and frequency ordering differ. Final Answer: A-2, B-4, C-1

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