Q: Reflection coefficient Γ and load conditions — match each statement in List I with the corresponding load condition in List II. List I (Statements) A. Γ = 0 (reflection coefficient equals zero) B. Γ = −1 C. Γ = +1 D. −1 < Γ < +1 (strict inequality)…

Introduction: The reflection coefficient Γ characterizes how a transmission line reflects power at its load. Correctly matching specific Γ values and ranges to load conditions is foundational for RF design, impedance matching, and network analysis. Given Data / Assumptions: Uniform line with characteristic impedance Z0. Load impedance ZL may be 0, ∞, Z0, or a finite passive value not equal to Z0. Γ = (ZL − Z0) / (ZL + Z0), and for any passive finite ZL, |Γ| < 1. Concept / Approach: Use the defining limits: Γ = 0 corresponds to ZL = Z0 (match). Γ = −1 occurs for a short (ZL = 0). Γ = +1 occurs for an open (ZL → ∞). For any finite passive mismatch ZL ≠ Z0, the magnitude satisfies 0 < |Γ| < 1, which is captured by −1 < Γ < +1 (strict) when phase is 0 or π for purely real cases; in general, |Γ| < 1 in the complex plane. Step-by-Step Solution: A: Γ = 0 → ZL = Z0 → 2.B: Γ = −1 → ZL = 0 → 3.C: Γ = +1 → ZL = ∞ → 4.D: −1 < Γ < +1 → finite passive ZL ≠ Z0 → 1. Verification / Alternative check: On the Smith chart, ZL = Z0 is the center (Γ = 0); the leftmost point is a short (Γ = −1), the rightmost is an open (Γ = +1), and all finite passive impedances lie inside the unit circle (|Γ| < 1). Why Other Options Are Wrong: Assignments that map Γ = ±1 to ZL = Z0 violate the definition. Mapping −1 < Γ < +1 to ZL = ∞ or ZL = 0 confuses extremes with interior points. Common Pitfalls: Equating the real-line inequality −1 < Γ < +1 with the full complex condition; the safe statement is |Γ| < 1 for passive finite loads. Final Answer: A-2, B-3, C-4, D-1

Q: Digital logic classification — match each digital building block with its circuit type (combinational or sequential). List I (Digital circuit) A. BCD-to-7-segment decoder/driver B. 4-to-1 multiplexer (MUX) C. 4-bit shift register List II (Circuit …

Introduction: Digital subsystems are broadly categorized as combinational (output depends only on present inputs) or sequential (output depends on present inputs and stored state). Correct classification helps in selecting timing, power, and verification strategies. Given Data / Assumptions: BCD-to-7-segment decoder/driver translates a 4-bit BCD input into 7 output segments. A 4-to-1 multiplexer selects one of four inputs according to select lines. A 4-bit shift register stores and shifts data with clock edges. Concept / Approach: Combinational logic has no memory: outputs change immediately with inputs (subject to propagation delay). Sequential logic includes storage (latches/flip-flops), requiring clocks or feedback to maintain state. Decoders and multiplexers compute logical functions; shift registers use flip-flops to move bits over time. Step-by-Step Solution: A: BCD-to-7-seg decoder → truth-table mapping → combinational → 2.B: 4-to-1 MUX → selects inputs via logic → combinational → 2.C: 4-bit shift register → bank of flip-flops with clock → sequential → 1. Verification / Alternative check: Timing diagrams show that MUX/decoder outputs are algebraic functions of inputs, while shift-register outputs depend on prior clock cycles, confirming the classification. Why Other Options Are Wrong: Treating MUX/decoder as sequential implies memory where none exists. Marking shift registers as combinational ignores their clocked storage nature. “Neither sequential nor combinational” does not apply to standard digital blocks. Common Pitfalls: Confusing propagation delay with memory; delay does not constitute state. Only storage elements or feedback loops create sequential behavior. Final Answer: A-2, B-2, C-1

Q: Operator precedence (BASIC-style evaluation order): Match each operation category with its priority rank, where 1 is the highest priority and 4 is the lowest. List I (Operation) List II (Priority) A. Exponentiation 1. Highest B. Multiplication and d…

Introduction / Context: Coding and math evaluation rules share a universal theme: parentheses first, then powers, then multiply/divide, and finally add/subtract. This item verifies your grasp of precedence in a BASIC-style hierarchy. Given Data / Assumptions: Priority rank 1 is the highest, 4 is the lowest. Categories are grouped (e.g., * and / share a level). Parentheses explicitly override default precedence. Concept / Approach: The canonical order is: parentheses → exponentiation → multiplication/division → addition/subtraction. We simply map each category to its ordinal rank. Step-by-Step Solution: Parentheses have the highest priority ⇒ D-1.Exponentiation is evaluated next ⇒ A-2.Multiplication and division come after powers ⇒ B-3.Addition and subtraction are last ⇒ C-4. Verification / Alternative check: Evaluate 2 + 3 * 4^2: parentheses first (none), exponent first (4^2=16), then multiply (3*16=48), finally add (2+48=50). This matches the mapped precedence. Why Other Options Are Wrong: Putting exponentiation above parentheses defeats the explicit-grouping rule. Swapping add/sub before multiply/divide violates standard arithmetic precedence. Any scheme with parentheses not at the top is incorrect for BASIC-style evaluation. Common Pitfalls: Forgetting that nested parentheses are evaluated from the innermost outward, and confusing right-associative exponentiation behavior in some languages (which does not change its rank versus * and +). Final Answer: A-2, B-3, C-4, D-1

Q: Small-signal h-parameters (common-emitter, typical orders of magnitude): Match each parameter symbol to its representative magnitude or unit category. List I List II A. h_ie (input resistance) 1. 49 (current gain h_fe) B. h_re (reverse voltage) 2. 2…

Introduction / Context: h-parameters summarize a BJT’s small-signal behavior. Remembering their typical magnitudes helps you sanity-check datasheets and exam problems quickly. Given Data / Assumptions: Common-emitter configuration assumed. Representative (order-of-magnitude) values are used. Exact values vary with bias and device type; the goal is correct pairing. Concept / Approach: Recall: h_ie is an input resistance (kΩ range), h_re is a very small reverse transfer (10^-4), h_fe is the familiar current gain (tens to hundreds), and h_oe is an output conductance (tens of μS). Step-by-Step Solution: h_ie → ≈ 1 kΩ ⇒ A-4.h_re → ≈ 2.4 × 10^-4 (dimensionless) ⇒ B-3.h_fe → ≈ 49 (unitless current gain) ⇒ C-1.h_oe → ≈ 25 × 10^-6 S (μS) ⇒ D-2. Verification / Alternative check: Typical transistor small-signal models list h_ie in the kilo-ohm range, h_fe near 50–200, h_re in the 10^-4–10^-3 range, and h_oe in tens of μS, confirming the mapping. Why Other Options Are Wrong: Swapping h_ie with a conductance value mixes resistance with siemens. Assigning large numeric gain to h_re contradicts its back-transfer meaning. Common Pitfalls: Confusing h_fe (current gain) with β in DC; while related, the small-signal and DC operating points may differ. Final Answer: A-4, B-3, C-1, D-2

Q: Logic families versus hallmark characteristics: Match the logic family with its most typical characteristic. List I (Family) List II (Characteristic) A. TTL 1. Maximum power consumption B. ECL 2. Highest packing density (within classic NMOS/CMOS/TTL…

Introduction / Context: Each logic family trades speed, power, and density differently. Knowing their signatures helps in both digital design history and exam matching problems. Given Data / Assumptions: Classic families (TTL, ECL, NMOS, CMOS) considered. We focus on hallmark traits, not every variant. Relative comparisons: ECL draws high static power; CMOS excels in low power. Concept / Approach: TTL is a saturated bipolar family, ECL avoids saturation for speed but at high power, NMOS historically achieved high integration density before CMOS dominance, and CMOS minimizes power via complementary transistors with near-zero static current in ideal logic states. Step-by-Step Solution: TTL → Saturated logic ⇒ A-4.ECL → Maximum power consumption (very fast, constant bias currents) ⇒ B-1.NMOS → High packing density in the pre-CMOS era ⇒ C-2.CMOS → Least power consumption (static) ⇒ D-3. Verification / Alternative check: Datasheets and textbooks consistently profile ECL as high-power/high-speed, TTL as saturated bipolar, NMOS as dense but power-hungry, and CMOS as low-power with massive modern density. Why Other Options Are Wrong: Assigning lowest power to TTL conflicts with its bipolar nature. Calling NMOS “least power” contradicts static DC paths in pull-ups. Labeling CMOS “saturated logic” misstates its operation. Common Pitfalls: Projecting today’s CMOS leadership in density back onto historical NMOS/TTL contexts; this item targets hallmark, not current-market outcomes. Final Answer: A-4, B-1, C-2, D-3

Q: Opto/quantum device properties: Match each device with the defining physical attribute or emission property. List I List II A. LED 1. Heavy doping (degenerate p–n junction) B. Avalanche photodiode2. Coherent radiation C. Tunnel diode 3. Spontaneous …

Introduction / Context: LEDs, APDs, tunnel diodes, and LASERs are staple devices in electronics and photonics. This matching tests recognition of their core physical mechanisms. Given Data / Assumptions: LED emission is spontaneous; LASER emission is coherent (stimulated). APD uses avalanche multiplication (current gain). Tunnel diode depends on heavy (degenerate) doping to enable quantum tunneling and negative resistance. Concept / Approach: Connect each device to the mechanism it is known for: spontaneous vs. coherent emission, avalanche gain, and tunneling due to heavy doping. Step-by-Step Solution: LED → spontaneous emission ⇒ A-3.APD → impact-ionization current gain ⇒ B-4.Tunnel diode → heavy doping ⇒ C-1.LASER → coherent (stimulated) emission ⇒ D-2. Verification / Alternative check: Device I–V curves and optical spectra verify: LEDs have broad spectra; LASERs have narrow coherent output; APDs show multiplication factors M; tunnel diodes display negative resistance due to tunneling. Why Other Options Are Wrong: Swapping LED with LASER confuses spontaneous versus stimulated emission. Attributing “current gain” to tunnel diodes ignores their primary quantum mechanism. Common Pitfalls: Assuming all photodiodes are alike; APDs are distinct because of avalanche multiplication and higher sensitivity requirements. Final Answer: A-3, B-4, C-1, D-2

Q: Power/trigger devices: Match each device with a characteristic application or control property. List I List II A. GTO 1. Widely used as switches in digital computers B. UJT 2. Used for freewheeling (commutation) paths C. Power diode 3. Can be turned…

Introduction / Context: Power electronics integrates devices with distinct control behaviors. Recognizing their hallmark uses is essential for converter and trigger design. Given Data / Assumptions: GTO = Gate Turn-Off thyristor. UJT = Unijunction transistor. Power diode used in rectifiers and freewheeling paths. MOSFET commonly used as the basic switch in digital logic. Concept / Approach: Map each device’s well-known control trait: GTO’s gate-off capability, UJT’s relaxation oscillation for triggering, power diode’s freewheeling role, and MOSFET’s ubiquity in digital switching. Step-by-Step Solution: GTO → can be turned off by negative gate signal ⇒ A-3.UJT → used to generate trigger pulses ⇒ B-4.Power diode → freewheeling path across inductive loads ⇒ C-2.MOSFET → widely used as digital computer switch ⇒ D-1. Verification / Alternative check: Converter schematics show freewheeling diodes across inductors; UJT timers in classic firing circuits; GTO datasheets specify gate-off conditions; MOSFETs populate logic ICs and CPUs (CMOS). Why Other Options Are Wrong: Swapping GTO with diode ignores their fundamentally different control. Assigning “freewheeling” to MOSFETs mislabels the role; the intrinsic body diode is not the primary freewheel device in all designs. Common Pitfalls: Assuming SCRs can all be turned off by gate—only GTOs have gate turn-off capability; standard SCRs require current fall below holding current or forced commutation. Final Answer: A-3, B-4, C-2, D-1

Q: Rectifier topologies and diode counts: Match each rectifier with the number of diodes required. List I (Rectifier) List II (Number of diodes) A. Full-wave bridge rectifier 1. 1 B. Half-wave rectifier 2. 2 C. Full-wave rectifier with centre-tapped tr…

Introduction / Context: Different rectifier circuits achieve DC conversion with different device counts and transformer requirements. Counting diodes correctly is a frequent exam task and a practical design consideration. Given Data / Assumptions: Bridge rectifier uses four diodes in a full-wave configuration. Half-wave rectifier uses one diode. Full-wave rectifier with centre-tapped secondary uses two diodes. Concept / Approach: Associate each topology with its conduction paths per half-cycle and tally the required diodes. Step-by-Step Solution: Bridge: two diodes conduct on each half-cycle; total required = 4 ⇒ A-3.Half-wave: only one diode rectifies a single half-cycle ⇒ B-1.Centre-tap full-wave: one diode per half of the secondary ⇒ C-2. Verification / Alternative check: Standard power-supply schematics confirm the diode counts and current paths, matching the mapping. Why Other Options Are Wrong: Any mapping that assigns fewer than 4 diodes to a bridge rectifier is incorrect. Using more than one diode for half-wave is unnecessary and not standard. Common Pitfalls: Confusing “diodes conducting at a time” with “diodes required in the circuit.” In a bridge, two conduct at once, but the circuit still needs four. Final Answer: A-3, B-1, C-2

Question 1

Electromagnetic propagation and antennas — match each concept with its best description.  List I (Concept) A. Evanescent wave B. Skip distance C. Return loss D. Antenna array  List II (Description) 1. Pattern multiplication principle (array factor ×…

Accepted Answer

Introduction: This matching item spans wave propagation, transmission-line mismatch metrics, and antenna-array fundamentals. Mastering these associations is essential for RF design, microwave engineering, and antenna systems. Given Data / Assumptions: Evanescent waves arise when a structure operates below cutoff or at total internal reflection beyond the critical angle. Skip distance is an HF (short-wave) ionospheric parameter indicating the nearest ground point of skywave return. Return loss quantifies mismatch using reflected/incident power ratio. Antenna arrays leverage the pattern multiplication principle. Concept / Approach: Choose the description that uniquely identifies each concept: exponential field decay without net power flow along the propagation direction for evanescence; HF skywave geometry setting the skip zone for skip distance; mismatch metric on lines for return loss; and multiplication of array factor with element pattern for arrays. Step-by-Step Solution: Evanescent wave → below-cutoff behavior → 5.Skip distance → HF ionospheric hop distance → 4.Return loss → transmission-line mismatch measure → 2.Antenna array → pattern multiplication → 1. Verification / Alternative check: Standard EM textbooks define evanescence as exponential attenuation in classically forbidden regions; antenna texts derive array patterns as product of element pattern and array factor; and transmission-line handbooks define return loss as −20 log10|Γ|. Why Other Options Are Wrong: Relating return loss to HF skip (4) confuses propagation with line mismatch. Assigning arrays to lossy media (3) misstates the array principle. Evanescent ≠ lossy; attenuation here is geometric/boundary-induced, not purely material loss. Common Pitfalls: Mixing up return loss with VSWR or mismatch loss; they are related but not identical. Also, evanescent fields can exist in lossless media due to boundary conditions, not because the medium is lossy. Final Answer: A-5, B-4, C-2, D-1

Question 2

VCR formats and azimuth recording — match each video cassette recorder system with its typical head azimuth angle.  List I (VCR system) A. VHS B. Video 2000 (V2000) C. Betamax  List II (Azimuth angle) 1. 7° 2. 15° 3. 6°

Accepted Answer

Introduction: Helical-scan VCR systems use azimuth recording to reduce crosstalk between adjacent tracks. Small differences in head azimuth angle cause off-azimuth signal attenuation for adjacent tracks, improving SNR without guard bands. This question links each consumer VCR format to its characteristic azimuth angle. Given Data / Assumptions: VHS, Betamax, and Video 2000 are classic analog formats. Typical azimuth angles are approximate but well-known: VHS ≈ 6°, Betamax ≈ 7°, Video 2000 ≈ 15°. We assume standard-speed recording heads. Concept / Approach: Azimuth recording relies on deliberate head-gap tilt so that the playback head sees large azimuth loss for adjacent tracks. Formats selected an azimuth pair that balanced crosstalk suppression, head wear, and manufacturability. Video 2000 used a larger azimuth (≈15°) than VHS or Betamax, which were around 6–7°. Step-by-Step Solution: Identify format-specific angles: VHS → 6°, Video 2000 → 15°, Betamax → 7°.Map A (VHS) → 3 (6°).Map B (Video 2000) → 2 (15°).Map C (Betamax) → 1 (7°). Verification / Alternative check: Manufacturer service manuals and format standards list these nominal azimuth values; tolerances exist but the relative ordering (V2000 highest) is consistent. Why Other Options Are Wrong: Options assigning VHS to 7° or 15° contradict common specifications. Any mapping giving Video 2000 the smallest angle reverses the established hierarchy. Common Pitfalls: Confusing azimuth angle with head wrap angle or track pitch; these are different mechanical parameters. Final Answer: A-3, B-2, C-1

Question 3

Series RLC step/impulse behavior — match resistance conditions to the qualitative response (assume the standard form R compared to 2sqrt(L/C)).  List I (Condition) A. R = 0 B. R < 2sqrt(L/C) C. R = 2sqrt(L/C) D. R > 2sqrt(L/C)  List II (Response) 1.…

Accepted Answer

Introduction: The damping nature of a series RLC circuit depends on the relative magnitude of R to the critical value 2sqrt(L/C). Recognizing underdamped, critically damped, overdamped, and ideal undamped cases is essential for filter, timing, and surge design. Given Data / Assumptions: Standard series RLC with resistance R, inductance L, capacitance C. Natural frequency ω0 = 1/sqrt(LC). Critical damping threshold at R = 2sqrt(L/C) (in SI units for series form). Concept / Approach: The characteristic equation roots determine the impulse/step response: underdamped (complex conjugate), critically damped (repeated real), overdamped (distinct real), and undamped (pure imaginary when R=0). Matching each region of R to its qualitative response follows directly from the discriminant of the second-order system. Step-by-Step Solution: R = 0 → zero damping → sustained sinusoidal oscillation → 1.R < 2sqrt(L/C) → complex roots → decaying oscillations → 2.R = 2sqrt(L/C) → repeated real root → fastest non-oscillatory response → 3.R > 2sqrt(L/C) → two negative real roots → slow non-oscillatory decay → 4. Verification / Alternative check: Compute damping ratio ζ = R / (2sqrt(L/C)). Then ζ < 1 underdamped, ζ = 1 critical, ζ > 1 overdamped; ζ = 0 gives undamped oscillation. Why Other Options Are Wrong: Swapping 2 and 4 confuses underdamped with overdamped behavior. Assigning A ≠ 1 implies oscillation even with resistance, contradicting R = 0 only. Common Pitfalls: Mixing the series and parallel RLC criteria; always check which topology is assumed. Also ensure consistent SI units when using 2sqrt(L/C). Final Answer: A-1, B-2, C-3, D-4

Question 4

Reflection coefficient Γ and load conditions — match each statement in List I with the corresponding load condition in List II.  List I (Statements) A. Γ = 0 (reflection coefficient equals zero) B. Γ = −1 C. Γ = +1 D. −1 < Γ < +1 (strict inequality)…

Accepted Answer

Introduction: The reflection coefficient Γ characterizes how a transmission line reflects power at its load. Correctly matching specific Γ values and ranges to load conditions is foundational for RF design, impedance matching, and network analysis. Given Data / Assumptions: Uniform line with characteristic impedance Z0. Load impedance ZL may be 0, ∞, Z0, or a finite passive value not equal to Z0. Γ = (ZL − Z0) / (ZL + Z0), and for any passive finite ZL, |Γ| < 1. Concept / Approach: Use the defining limits: Γ = 0 corresponds to ZL = Z0 (match). Γ = −1 occurs for a short (ZL = 0). Γ = +1 occurs for an open (ZL → ∞). For any finite passive mismatch ZL ≠ Z0, the magnitude satisfies 0 < |Γ| < 1, which is captured by −1 < Γ < +1 (strict) when phase is 0 or π for purely real cases; in general, |Γ| < 1 in the complex plane. Step-by-Step Solution: A: Γ = 0 → ZL = Z0 → 2.B: Γ = −1 → ZL = 0 → 3.C: Γ = +1 → ZL = ∞ → 4.D: −1 < Γ < +1 → finite passive ZL ≠ Z0 → 1. Verification / Alternative check: On the Smith chart, ZL = Z0 is the center (Γ = 0); the leftmost point is a short (Γ = −1), the rightmost is an open (Γ = +1), and all finite passive impedances lie inside the unit circle (|Γ| < 1). Why Other Options Are Wrong: Assignments that map Γ = ±1 to ZL = Z0 violate the definition. Mapping −1 < Γ < +1 to ZL = ∞ or ZL = 0 confuses extremes with interior points. Common Pitfalls: Equating the real-line inequality −1 < Γ < +1 with the full complex condition; the safe statement is |Γ| < 1 for passive finite loads. Final Answer: A-2, B-3, C-4, D-1

Question 5

Digital logic classification — match each digital building block with its circuit type (combinational or sequential).  List I (Digital circuit) A. BCD-to-7-segment decoder/driver B. 4-to-1 multiplexer (MUX) C. 4-bit shift register  List II (Circuit …

Accepted Answer

Introduction: Digital subsystems are broadly categorized as combinational (output depends only on present inputs) or sequential (output depends on present inputs and stored state). Correct classification helps in selecting timing, power, and verification strategies. Given Data / Assumptions: BCD-to-7-segment decoder/driver translates a 4-bit BCD input into 7 output segments. A 4-to-1 multiplexer selects one of four inputs according to select lines. A 4-bit shift register stores and shifts data with clock edges. Concept / Approach: Combinational logic has no memory: outputs change immediately with inputs (subject to propagation delay). Sequential logic includes storage (latches/flip-flops), requiring clocks or feedback to maintain state. Decoders and multiplexers compute logical functions; shift registers use flip-flops to move bits over time. Step-by-Step Solution: A: BCD-to-7-seg decoder → truth-table mapping → combinational → 2.B: 4-to-1 MUX → selects inputs via logic → combinational → 2.C: 4-bit shift register → bank of flip-flops with clock → sequential → 1. Verification / Alternative check: Timing diagrams show that MUX/decoder outputs are algebraic functions of inputs, while shift-register outputs depend on prior clock cycles, confirming the classification. Why Other Options Are Wrong: Treating MUX/decoder as sequential implies memory where none exists. Marking shift registers as combinational ignores their clocked storage nature. “Neither sequential nor combinational” does not apply to standard digital blocks. Common Pitfalls: Confusing propagation delay with memory; delay does not constitute state. Only storage elements or feedback loops create sequential behavior. Final Answer: A-2, B-2, C-1

Question 6

Match the following instrument types with their characteristic scales or uses. List I (Instrument) List II (Characteristic) A. PMMC (Permanent-Magnet Moving-Coil) 1. Square-law type scale B. Moving-iron meter 2. Very good frequency response (wideban…

Accepted Answer

Introduction / Context: This matching question checks core instrumentation knowledge: how common meters behave and which scales they naturally produce. Recognizing these pairings helps you select the right instrument in labs and exams. Given Data / Assumptions: PMMC meters respond to average of rectified current and feature linear torque with current in their coils. Moving-iron meters exhibit a force proportional to I^2, leading to a non-linear (square-law) scale. Thermocouple (thermal) meters convert RF power to heat, then to DC via a thermocouple, enabling wideband response. Electrostatic instruments use electrostatic attraction, ideal for high-voltage measurements (as voltmeters). Concept / Approach: Map each physical principle to its signature measurement behavior: linearity for PMMC, square-law for moving-iron, wide frequency response for thermocouple, and voltage measurement for electrostatic devices. Step-by-Step Solution: PMMC → torque ∝ I, hence a linear scale ⇒ A-3.Moving-iron → deflecting force ∝ I^2, giving a square-law scale ⇒ B-1.Thermocouple meter → responds to heating effect of current, excellent RF response ⇒ C-2.Electrostatic instrument → measures voltage via electrostatic force ⇒ D-4. Verification / Alternative check: Lab manuals list PMMC as the preferred DC ammeter/voltmeter for linear scales; moving-iron meters are recommended for AC with non-linear scales; thermal meters are rated for RF; electrostatic voltmeters are standard for high-voltage DC/AC. Why Other Options Are Wrong: Any mapping that assigns linear scale to moving-iron conflicts with I^2 dependence. Assigning “wide response” to PMMC ignores frequency limits due to coil inductance and inertia. Electrostatic instruments as current meters are impractical; they are voltage-oriented. Common Pitfalls: Confusing thermocouple meters with PMMC because both involve DC readout; the key difference is the thermal sensing element that enables RF measurement. Final Answer: A-3, B-1, C-2, D-4

Question 7

Operator precedence (BASIC-style evaluation order): Match each operation category with its priority rank, where 1 is the highest priority and 4 is the lowest. List I (Operation) List II (Priority) A. Exponentiation 1. Highest B. Multiplication and d…

Accepted Answer

Introduction / Context: Coding and math evaluation rules share a universal theme: parentheses first, then powers, then multiply/divide, and finally add/subtract. This item verifies your grasp of precedence in a BASIC-style hierarchy. Given Data / Assumptions: Priority rank 1 is the highest, 4 is the lowest. Categories are grouped (e.g., * and / share a level). Parentheses explicitly override default precedence. Concept / Approach: The canonical order is: parentheses → exponentiation → multiplication/division → addition/subtraction. We simply map each category to its ordinal rank. Step-by-Step Solution: Parentheses have the highest priority ⇒ D-1.Exponentiation is evaluated next ⇒ A-2.Multiplication and division come after powers ⇒ B-3.Addition and subtraction are last ⇒ C-4. Verification / Alternative check: Evaluate 2 + 3 * 4^2: parentheses first (none), exponent first (4^2=16), then multiply (3*16=48), finally add (2+48=50). This matches the mapped precedence. Why Other Options Are Wrong: Putting exponentiation above parentheses defeats the explicit-grouping rule. Swapping add/sub before multiply/divide violates standard arithmetic precedence. Any scheme with parentheses not at the top is incorrect for BASIC-style evaluation. Common Pitfalls: Forgetting that nested parentheses are evaluated from the innermost outward, and confusing right-associative exponentiation behavior in some languages (which does not change its rank versus * and +). Final Answer: A-2, B-3, C-4, D-1

Question 8

Small-signal h-parameters (common-emitter, typical orders of magnitude): Match each parameter symbol to its representative magnitude or unit category. List I List II A. h_ie (input resistance) 1. 49 (current gain h_fe) B. h_re (reverse voltage) 2. 2…

Accepted Answer

Introduction / Context: h-parameters summarize a BJT’s small-signal behavior. Remembering their typical magnitudes helps you sanity-check datasheets and exam problems quickly. Given Data / Assumptions: Common-emitter configuration assumed. Representative (order-of-magnitude) values are used. Exact values vary with bias and device type; the goal is correct pairing. Concept / Approach: Recall: h_ie is an input resistance (kΩ range), h_re is a very small reverse transfer (10^-4), h_fe is the familiar current gain (tens to hundreds), and h_oe is an output conductance (tens of μS). Step-by-Step Solution: h_ie → ≈ 1 kΩ ⇒ A-4.h_re → ≈ 2.4 × 10^-4 (dimensionless) ⇒ B-3.h_fe → ≈ 49 (unitless current gain) ⇒ C-1.h_oe → ≈ 25 × 10^-6 S (μS) ⇒ D-2. Verification / Alternative check: Typical transistor small-signal models list h_ie in the kilo-ohm range, h_fe near 50–200, h_re in the 10^-4–10^-3 range, and h_oe in tens of μS, confirming the mapping. Why Other Options Are Wrong: Swapping h_ie with a conductance value mixes resistance with siemens. Assigning large numeric gain to h_re contradicts its back-transfer meaning. Common Pitfalls: Confusing h_fe (current gain) with β in DC; while related, the small-signal and DC operating points may differ. Final Answer: A-4, B-3, C-1, D-2

Question 9

Logic families versus hallmark characteristics: Match the logic family with its most typical characteristic. List I (Family) List II (Characteristic) A. TTL 1. Maximum power consumption B. ECL 2. Highest packing density (within classic NMOS/CMOS/TTL…

Accepted Answer

Introduction / Context: Each logic family trades speed, power, and density differently. Knowing their signatures helps in both digital design history and exam matching problems. Given Data / Assumptions: Classic families (TTL, ECL, NMOS, CMOS) considered. We focus on hallmark traits, not every variant. Relative comparisons: ECL draws high static power; CMOS excels in low power. Concept / Approach: TTL is a saturated bipolar family, ECL avoids saturation for speed but at high power, NMOS historically achieved high integration density before CMOS dominance, and CMOS minimizes power via complementary transistors with near-zero static current in ideal logic states. Step-by-Step Solution: TTL → Saturated logic ⇒ A-4.ECL → Maximum power consumption (very fast, constant bias currents) ⇒ B-1.NMOS → High packing density in the pre-CMOS era ⇒ C-2.CMOS → Least power consumption (static) ⇒ D-3. Verification / Alternative check: Datasheets and textbooks consistently profile ECL as high-power/high-speed, TTL as saturated bipolar, NMOS as dense but power-hungry, and CMOS as low-power with massive modern density. Why Other Options Are Wrong: Assigning lowest power to TTL conflicts with its bipolar nature. Calling NMOS “least power” contradicts static DC paths in pull-ups. Labeling CMOS “saturated logic” misstates its operation. Common Pitfalls: Projecting today’s CMOS leadership in density back onto historical NMOS/TTL contexts; this item targets hallmark, not current-market outcomes. Final Answer: A-4, B-1, C-2, D-3

Question 10

Opto/quantum device properties: Match each device with the defining physical attribute or emission property. List I List II A. LED 1. Heavy doping (degenerate p–n junction) B. Avalanche photodiode2. Coherent radiation C. Tunnel diode 3. Spontaneous …

Accepted Answer

Introduction / Context: LEDs, APDs, tunnel diodes, and LASERs are staple devices in electronics and photonics. This matching tests recognition of their core physical mechanisms. Given Data / Assumptions: LED emission is spontaneous; LASER emission is coherent (stimulated). APD uses avalanche multiplication (current gain). Tunnel diode depends on heavy (degenerate) doping to enable quantum tunneling and negative resistance. Concept / Approach: Connect each device to the mechanism it is known for: spontaneous vs. coherent emission, avalanche gain, and tunneling due to heavy doping. Step-by-Step Solution: LED → spontaneous emission ⇒ A-3.APD → impact-ionization current gain ⇒ B-4.Tunnel diode → heavy doping ⇒ C-1.LASER → coherent (stimulated) emission ⇒ D-2. Verification / Alternative check: Device I–V curves and optical spectra verify: LEDs have broad spectra; LASERs have narrow coherent output; APDs show multiplication factors M; tunnel diodes display negative resistance due to tunneling. Why Other Options Are Wrong: Swapping LED with LASER confuses spontaneous versus stimulated emission. Attributing “current gain” to tunnel diodes ignores their primary quantum mechanism. Common Pitfalls: Assuming all photodiodes are alike; APDs are distinct because of avalanche multiplication and higher sensitivity requirements. Final Answer: A-3, B-4, C-1, D-2

Question 11

Power/trigger devices: Match each device with a characteristic application or control property. List I List II A. GTO 1. Widely used as switches in digital computers B. UJT 2. Used for freewheeling (commutation) paths C. Power diode 3. Can be turned…

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Introduction / Context: Power electronics integrates devices with distinct control behaviors. Recognizing their hallmark uses is essential for converter and trigger design. Given Data / Assumptions: GTO = Gate Turn-Off thyristor. UJT = Unijunction transistor. Power diode used in rectifiers and freewheeling paths. MOSFET commonly used as the basic switch in digital logic. Concept / Approach: Map each device’s well-known control trait: GTO’s gate-off capability, UJT’s relaxation oscillation for triggering, power diode’s freewheeling role, and MOSFET’s ubiquity in digital switching. Step-by-Step Solution: GTO → can be turned off by negative gate signal ⇒ A-3.UJT → used to generate trigger pulses ⇒ B-4.Power diode → freewheeling path across inductive loads ⇒ C-2.MOSFET → widely used as digital computer switch ⇒ D-1. Verification / Alternative check: Converter schematics show freewheeling diodes across inductors; UJT timers in classic firing circuits; GTO datasheets specify gate-off conditions; MOSFETs populate logic ICs and CPUs (CMOS). Why Other Options Are Wrong: Swapping GTO with diode ignores their fundamentally different control. Assigning “freewheeling” to MOSFETs mislabels the role; the intrinsic body diode is not the primary freewheel device in all designs. Common Pitfalls: Assuming SCRs can all be turned off by gate—only GTOs have gate turn-off capability; standard SCRs require current fall below holding current or forced commutation. Final Answer: A-3, B-4, C-2, D-1

Question 12

Rectifier topologies and diode counts: Match each rectifier with the number of diodes required. List I (Rectifier) List II (Number of diodes) A. Full-wave bridge rectifier 1. 1 B. Half-wave rectifier 2. 2 C. Full-wave rectifier with centre-tapped tr…

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Introduction / Context: Different rectifier circuits achieve DC conversion with different device counts and transformer requirements. Counting diodes correctly is a frequent exam task and a practical design consideration. Given Data / Assumptions: Bridge rectifier uses four diodes in a full-wave configuration. Half-wave rectifier uses one diode. Full-wave rectifier with centre-tapped secondary uses two diodes. Concept / Approach: Associate each topology with its conduction paths per half-cycle and tally the required diodes. Step-by-Step Solution: Bridge: two diodes conduct on each half-cycle; total required = 4 ⇒ A-3.Half-wave: only one diode rectifies a single half-cycle ⇒ B-1.Centre-tap full-wave: one diode per half of the secondary ⇒ C-2. Verification / Alternative check: Standard power-supply schematics confirm the diode counts and current paths, matching the mapping. Why Other Options Are Wrong: Any mapping that assigns fewer than 4 diodes to a bridge rectifier is incorrect. Using more than one diode for half-wave is unnecessary and not standard. Common Pitfalls: Confusing “diodes conducting at a time” with “diodes required in the circuit.” In a bridge, two conduct at once, but the circuit still needs four. Final Answer: A-3, B-1, C-2

Question 13

Network theorems and hallmark properties: Match each theorem to the most distinguished property it leverages. List I (Theorem) List II (Property) A. Reciprocity 1. Impedance matching B. Tellegen’s 2. Bilateral behavior C. Superposition 3. Σ v_k i_k …

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Introduction / Context: Each classic network theorem highlights a structural property of circuits. Correctly pairing them helps in quickly selecting which theorem applies in analysis or design. Given Data / Assumptions: Linear, time-invariant circuit assumptions for superposition and reciprocity. Tellegen’s theorem is topology-based and universally valid. Maximum power transfer refers to source/load impedance relation. Concept / Approach: Map the theorem to the property it fundamentally uses: reciprocity ↔ bilateral networks, Tellegen ↔ power balance identity, superposition ↔ linearity, and maximum power transfer ↔ impedance matching. Step-by-Step Solution: Reciprocity → bilateral behavior ⇒ A-2.Tellegen’s → Σ v_k i_k = 0 style identity ⇒ B-3.Superposition → linearity requirement ⇒ C-4.Max power transfer → impedance matching between source and load ⇒ D-1. Verification / Alternative check: Text derivations show reciprocity matrices symmetric only for bilateral linear networks; Tellegen’s holds for any lumped network; superposition fails for nonlinear elements; maximum power occurs when load equals Thevenin impedance (or its conjugate in AC). Why Other Options Are Wrong: Pairing superposition with “non-linear” contradicts its premise. Associating reciprocity with matching confuses a property with a design criterion. Common Pitfalls: Thinking Tellegen’s requires linearity; it does not—it is topology-based and widely valid. Final Answer: A-2, B-3, C-4, D-1

Question 14

Java comparison operators and meanings: Match each symbol with its relational meaning. List I (Symbol) List II (Meaning) A. == 1. Greater than or equal to B. != 2. Equal C. >= 3. Not equal

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Introduction / Context: Relational operators are foundational in programming. Misreading ==, !=, or >= can invert logic and break conditionals. Given Data / Assumptions: Java syntax is being referenced (== for equality, != for inequality). Operators are used in boolean expressions. Comparison context is value comparison for primitives. Concept / Approach: Map each operator symbol to its English meaning: == means “equal,” != means “not equal,” and >= means “greater than or equal to.” Step-by-Step Solution: Identify A: == ⇒ Equal ⇒ A-2.Identify B: != ⇒ Not equal ⇒ B-3.Identify C: >= ⇒ Greater than or equal to ⇒ C-1. Verification / Alternative check: Short code test: if (x == 5), if (x != 0), if (x >= y) behave exactly as the meanings indicate. Why Other Options Are Wrong: Swapping == with != flips conditions and logic. Treating >= as equality or strict greater-than is incorrect and would fail boundary checks. Common Pitfalls: Confusing assignment (=) with equality (==) and misusing object equality versus reference equality (requires .equals for objects). Final Answer: A-2, B-3, C-1

Question 15

Modulation types and “modulation index” interpretations: Match each scheme with the most appropriate modulation-index characterization (as commonly presented in introductory exams). List I (Modulation) List II (Index characterization) A. DSBFC (AM w…

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Introduction / Context: “Modulation index” μ is rigorously defined for standard amplitude modulation with a residual carrier (DSBFC). For suppressed-carrier schemes (DSBSC, SSB), many textbooks present an equivalent or limiting characterization for comparison, which appears in exam match-the-following questions. Given Data / Assumptions: DSBFC: a carrier is present; μ is the ratio of message amplitude to carrier amplitude (practically μ > 0 and typically ≤ 1 to avoid over-modulation). DSBSC: carrier is zero; conventional μ relative to carrier is undefined and modeled as tending to ∞ in comparative tables. SSB: single sideband transmission; if μ is forced into a comparative table, it is often listed as μ > 1 relative to an equivalent carrier reference. Concept / Approach: We align with the common exam convention: DSBFC → μ > 0; DSBSC → ∞ (no carrier); SSB → μ > 1 when expressed in comparative “index” terms used in some introductory summaries. Note that in rigorous SSB analysis, “μ” is not used; power/efficiency is treated directly without a carrier reference. Step-by-Step Solution: DSBFC has a real carrier ⇒ μ defined and positive ⇒ A-2.DSBSC suppresses the carrier ⇒ μ vs. carrier notion diverges ⇒ B-3 (∞).SSB removes one sideband (and often the carrier) ⇒ tables sometimes state μ > 1 comparatively ⇒ C-1. Verification / Alternative check: Intro AM tables in many exam guides show DSBSC with “μ = ∞” and SSB with “μ > 1” as qualitative placeholders to emphasize carrier suppression and efficiency improvements relative to DSBFC. Why Other Options Are Wrong: Assigning finite μ to DSBSC contradicts its zero-carrier definition. Labeling DSBFC as μ any value ignores over-modulation distortion beyond μ = 1 in standard AM. Common Pitfalls: Treating these “indices” as rigorous in SSB/DSBSC; they are comparative heuristics. For precise design, compute power and bandwidth directly. Final Answer: A-2, B-3, C-1

Question 16

Microwave devices – Match each device to its typical application List I (Device) A. Reflex klystron B. Traveling-wave tube (TWT) C. Cavity klystron D. Maser  List II (Application)  Wideband amplification  Very low power amplification (ultra-low-nois…

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Introduction / Context: This matching problem tests core knowledge of classic microwave vacuum devices and masers. Each device has a characteristic role in RF/microwave systems—oscillation, amplification, bandwidth, noise performance, or frequency conversion. Understanding these “textbook roles” helps in system-level block diagram design. Given Data / Assumptions: Reflex klystron is a single-cavity, velocity-modulated tube commonly used as a low-power microwave oscillator. TWT is a broadband linear amplifier based on distributed interaction. Cavity klystron (multi-cavity) supports amplification and can be configured for harmonic multiplication. Maser provides extremely low-noise, very small-signal amplification. Concept / Approach: Map each device to the most standard application: reflex klystron → small, tunable microwave source (often FM capable); TWT → wideband amplification; cavity klystron → narrowband high-gain amplification and also used as a frequency multiplier with harmonic extraction; maser → very low power signal amplification with exceptional noise figure. Step-by-Step Solution: A (Reflex klystron) → 3 (low-power FM generation).B (TWT) → 1 (wideband amplification).C (Cavity klystron) → 4 (frequency multiplication via harmonic output configurations).D (Maser) → 2 (very low power amplification). Verification / Alternative check: Historical and modern references consistently place TWTs in broadband amplifier chains (satcom, EW), reflex klystrons as lab signal sources, masers in deep-space or ultra-low-noise front ends, and klystrons both as amplifiers and in some multiplier roles. Why Other Options Are Wrong: Pairings that assign wideband amplification to klystrons or FM generation to TWTs contradict the intrinsic device physics and standard usage. Assigning “very low power amplification” to anything other than a maser ignores its defining strength. Common Pitfalls: Confusing reflex and cavity klystrons (oscillator vs. amplifier/multiplier) and assuming all tubes are primarily amplifiers. Final Answer: A-3, B-1, C-4, D-2.

Question 17

Microwave devices – Match device to application List I (Device) A. PIN diode B. GaAs MOSFET (or MESFET) C. Transferred electron device (TED, e.g., Gunn diode) D. Varactor diode  List II (Application)  Microwave amplification (low-noise or power gain…

Accepted Answer

Introduction / Context: This match checks practical roles of common solid-state microwave parts used in front ends, oscillators, and control networks. While some parts can serve multiple roles, there are canonical uses that appear across textbooks and datasheets. Given Data / Assumptions: PIN diode: behaves as a current-controlled resistor/isolator at RF; also a widely used photodiode for light detection. GaAs MOSFET/MESFET: popular microwave transistor for low-noise and power amplification. Transferred electron device (Gunn): negative differential resistance device used for microwave oscillation. Varactor: reverse-biased junction used for voltage-controlled capacitance (electronic tuning). Concept / Approach: Map parts to their “most associated” applications: PIN diode → optical detection (when used as photodiode) or RF switching/attenuation; GaAs FET → amplification; Gunn (TED) → microwave generation; varactor → tuning (VCOs, multipliers, filters). Among given choices, this yields a clean one-to-one mapping without contradictions. Step-by-Step Solution: A (PIN diode) → 4 (light-wave detection).B (GaAs FET) → 1 (microwave amplification).C (TED/Gunn) → 2 (microwave generation; “low-noise” is relative here compared with some tubes).D (Varactor) → 3 (electronic tuning of MW oscillator). Verification / Alternative check: Standard RF handbooks show GaAs FET LNAs, varactor-tuned VCOs/filters, Gunn oscillators, and PIN photodiodes/switches, confirming the typical associations. Why Other Options Are Wrong: Swapping FET with varactor or Gunn contradicts their core device physics. Assigning microwave amplification to a varactor or Gunn conflicts with their usual oscillator/tuning roles. Common Pitfalls: Over-generalizing the PIN diode solely as an RF switch and forgetting its photodiode use; conflating “low-noise generation” with “amplification.” Final Answer: A-4, B-1, C-2, D-3.

Question 18

Set operations – Match operations with symbols List I (Operation) A. Set equality B. Set inclusion (subset or equal) C. Set intersection D. Set difference  List II (Symbol)  −  =  ⊆ (written here as ‘‘<=’’)  ∩ (written here as ‘‘*’’)  Choose the cor…

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Introduction / Context: Set theory uses standard symbolic notation. Many exams test recognition of these symbols, even if typeset constraints substitute ASCII forms (for example, using ‘‘’’ for intersection or ‘‘<=’’ for subset-or-equal). Given Data / Assumptions: Equality between sets uses ‘‘=’’. Subset or equal uses ‘‘⊆’’ (represented here as ‘‘<=’’). Intersection uses ‘‘∩’’ (represented here as ‘‘’’). Difference uses ‘‘−’’. Concept / Approach: Translate the ASCII stand-ins to the canonical math symbols, then match each operation to its symbol. Equality → ‘‘=’’; inclusion → ‘‘⊆’’; intersection → ‘‘∩’’; difference → ‘‘−’’. Step-by-Step Solution: A (Set equality) → 2 (=).B (Set inclusion) → 3 (⊆).C (Set intersection) → 4 (∩).D (Set difference) → 1 (−). Verification / Alternative check: Check with standard references or any discrete math text; the correspondence is universal. Why Other Options Are Wrong: Any option that swaps equality with inclusion or intersection with difference contradicts standard definitions. Common Pitfalls: Confusing subset ‘‘⊆’’ with proper subset ‘‘⊂’’; using ‘‘*’’ as multiplication instead of the stand-in for ‘‘∩’’ when typesetting is limited. Final Answer: A-2, B-3, C-4, D-1.

Question 19

Semiconductor basics – Match materials and roles List I (Material/Term) A. Silicon B. Antimony (Sb) C. Gallium (Ga) D. Germanium (Ge)  List II (Fact)  Donor impurity (n-type dopant)  Acceptor impurity (p-type dopant)  Most commonly used semiconducto…

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Introduction / Context: Device physics questions often test recognition of common dopants and elemental facts. Silicon dominates modern electronics; germanium details, and typical trivalent/pentavalent dopants like Ga and Sb, are staple facts. Given Data / Assumptions: Silicon (Si) is the mainstream semiconductor substrate. Antimony (Sb), with five valence electrons, acts as a donor (n-type) in Si/Ge. Gallium (Ga), with three valence electrons, acts as an acceptor (p-type). Germanium (Ge) has atomic number 32. Concept / Approach: Match valence considerations and periodic table facts to typical semiconductor roles. Pentavalent → donor; trivalent → acceptor; Si → dominant material platform; Ge → Z = 32. Step-by-Step Solution: A (Silicon) → 3 (most commonly used semiconductor material).B (Antimony) → 1 (donor impurity).C (Gallium) → 2 (acceptor impurity).D (Germanium) → 4 (atomic number 32). Verification / Alternative check: Standard doping tables list Sb as donor and Ga as acceptor for Si/Ge. Basic chemistry confirms Ge has atomic number 32. Why Other Options Are Wrong: Swapping donor/acceptor contradicts valence logic; mislabeling Si as anything but the dominant platform ignores industry reality. Common Pitfalls: Confusing Ga (acceptor) with Group V donors; forgetting Ge's atomic number. Final Answer: A-3, B-1, C-2, D-4.

Question 20

Second-order systems – Match characteristic equations to damping type List I (Characteristic equation) A. s^2 + 15 s + 56.25 B. s^2 + 5 s + 6 C. s^2 + 20.25 D. s^2 + 4.55 s + 42.25  List II (Damping classification)  Undamped  Underdamped  Critically…

Accepted Answer

Introduction / Context: Damping classification follows from the roots of the characteristic equation. The sign and discriminant of the quadratic determine whether the system is underdamped, critically damped, overdamped, or undamped (pure oscillation). Given Data / Assumptions: Standard second-order form s^2 + 2ζω_n s + ω_n^2 for positive parameters. Real coefficients and physical systems (stable if coefficients are positive). Concept / Approach: Use the discriminant Δ = b^2 − 4ac for s^2 + bs + c. If Δ > 0 → two distinct real roots (overdamped). If Δ = 0 → repeated real root (critical). If Δ < 0 → complex conjugate (underdamped). If b = 0 and c > 0 → purely imaginary roots (undamped sinusoid). Step-by-Step Solution: A: s^2 + 15s + 56.25 → Δ = 225 − 225 = 0 → critically damped → 3.B: s^2 + 5s + 6 → Δ = 25 − 24 = 1 > 0 → overdamped → 4.C: s^2 + 20.25 → b = 0 → roots ±j√20.25 → undamped → 1.D: s^2 + 4.55s + 42.25 → Δ = 20.7025 − 169 < 0 → underdamped → 2. Verification / Alternative check: Root plots confirm the classification: A has a repeated negative real root; B two distinct negative reals; C has pure imaginary roots; D complex conjugate with negative real part. Why Other Options Are Wrong: Any mapping that contradicts the discriminant test is incorrect. Common Pitfalls: Forgetting that b = 0 with positive c yields undamped oscillation; miscomputing the discriminant by sign errors. Final Answer: A-3, B-4, C-1, D-2.

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