8085 register-pair encoding — match bit patterns to register pairs List I (Bit pattern) A. 00 B. 01 C. 10 D. 11 List II (Register pair) 1. SP 2. B–C 3. D–E 4. H–L
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AA-1, B-2, C-3, D-4
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BA-2, B-3, C-4, D-1
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CA-2, B-3, C-1, D-4
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DA-4, B-3, C-2, D-1
Answer
Correct Answer: A-2, B-3, C-4, D-1
Explanation
Introduction / Context:Many 8085 instructions encode a register pair with a 2-bit field (rp). Knowing this mapping is essential for decoding opcodes (e.g., LXI rp, DAD rp, INX rp) and writing assemblers/disassemblers.
Given Data / Assumptions:
- We use the conventional 8085 mapping for register pairs in instructions that accept rp.
- The four register pairs are B–C, D–E, H–L, and SP.
Concept / Approach:Intel’s encoding assigns 00→BC, 01→DE, 10→HL, and 11→SP for the rp field. We simply pair each 2-bit code with its register pair.
Step-by-Step Solution:
Map 00 → B–C.Map 01 → D–E.Map 10 → H–L.Map 11 → SP.Verification / Alternative check:Check the opcode table: e.g., LXI rp uses opcodes 00xx1001 with rp in bits 5–4; decoding examples confirm the mapping above.
Why Other Options Are Wrong:
- Any option that swaps SP with HL or DE with BC would misdecode popular instructions like DAD H or INX D.
Common Pitfalls:Confusing the rp mapping with the r (3-bit) single-register field used in MOV/MVI/ADD; they are different encodings.
Final Answer:A-2, B-3, C-4, D-1