ADC architectures — match each converter type to its hallmark requirement or benefit List I (ADC type) A. Flash converter ADC B. Dual-slope ADC C. Successive-approximation ADC List II (Characteristic) 1. Requires conversion time of only a few microseconds 2. Requires a DAC in its feedback path 3. Minimizes effect of power-supply interference 4. Requires complex hardware 5. Is a tracking ADC

Introduction / Context:
Different ADC topologies trade speed, accuracy, complexity, and noise immunity. Pairing each with its defining trait enables informed converter selection for embedded and instrumentation systems.

Given Data / Assumptions:

• Flash ADC: parallel comparators and a resistor ladder.
• Dual-slope ADC: integrates input then reference, excellent at rejecting line hum.
• SAR ADC: binary search using DAC + comparator under SAR logic.

Concept / Approach:
Flash converters are the fastest but require many comparators → complex hardware. Dual-slope inherently averages the signal over an integer number of mains cycles → strong power-supply hum rejection. SAR uses an internal DAC to refine the trial code each bit time → requires DAC in its feedback path.

Step-by-Step Solution:

Verification / Alternative check:
Compare converter block diagrams: flash shows N-bit wide comparator array; SAR blocks include DAC; dual-slope timing diagrams integrate over T_int and T_ref to cancel periodic interference.

Why Other Options Are Wrong:

• “Tracking ADC” describes a different architecture (up/down counter type), not SAR or flash.
• Assigning “few microseconds” generically is ambiguous; many SARs are microseconds too, but the option set uses structural traits.

Common Pitfalls:
Confusing dual-slope with delta-sigma; both integrate, but delta-sigma uses oversampling and noise-shaping.

Final Answer:
A-4, B-3, C-2