Digital logic classification — match each digital building block with its circuit type (combinational or sequential). List I (Digital circuit) A. BCD-to-7-segment decoder/driver B. 4-to-1 multiplexer (MUX) C. 4-bit shift register List II (Circuit type) 1. Sequential circuit (has memory/state) 2. Combinational circuit (memoryless logic) 3. Neither sequential nor combinational (ill-defined/analog)

Introduction:
Digital subsystems are broadly categorized as combinational (output depends only on present inputs) or sequential (output depends on present inputs and stored state). Correct classification helps in selecting timing, power, and verification strategies.

Given Data / Assumptions:

• BCD-to-7-segment decoder/driver translates a 4-bit BCD input into 7 output segments.
• A 4-to-1 multiplexer selects one of four inputs according to select lines.
• A 4-bit shift register stores and shifts data with clock edges.

Concept / Approach:

Combinational logic has no memory: outputs change immediately with inputs (subject to propagation delay). Sequential logic includes storage (latches/flip-flops), requiring clocks or feedback to maintain state. Decoders and multiplexers compute logical functions; shift registers use flip-flops to move bits over time.

Step-by-Step Solution:

Verification / Alternative check:

Timing diagrams show that MUX/decoder outputs are algebraic functions of inputs, while shift-register outputs depend on prior clock cycles, confirming the classification.

Why Other Options Are Wrong:

• Treating MUX/decoder as sequential implies memory where none exists.
• Marking shift registers as combinational ignores their clocked storage nature.
• “Neither sequential nor combinational” does not apply to standard digital blocks.

Common Pitfalls:

Confusing propagation delay with memory; delay does not constitute state. Only storage elements or feedback loops create sequential behavior.

Final Answer:

A-2, B-2, C-1