Match adders with their time characteristics: (A) Serial binary adder, (B) Ripple-carry adder, (C) Carry look-ahead (CLA) adder — with (1) (2n − 1) * tpd, (2) (n − 1) * tpd, (3) Operation time approximately independent of size, (4) ≈ 6 * tpd for a 4-bit CLA.

Introduction:Adder architectures trade off speed, hardware, and control complexity. This question contrasts serial, ripple-carry, and carry look-ahead (CLA) adders using representative propagation-time models expressed in units of gate delay tpd.

Given Data / Assumptions:

• Serial adder processes one bit per cycle with carry feedback.
• Ripple-carry adder propagates carry linearly through stages.
• CLA uses parallel carry generation/propagation to shorten delay (e.g., typical 4-bit CLA ≈ 6 * tpd).
• Mappings offered include (1) (2n − 1) * tpd, (2) (n − 1) * tpd, (4) 6 * tpd for 4-bit CLA.

Concept / Approach:

Serial adders incur sequential cycles; a representative cumulative timing is proportional to n (often modeled near (2n − 1) * tpd including setup/feedback). Ripple-carry adders have worst-case delay set by carry propagating through (n − 1) full-adder stages. CLA short-circuits the linear chain via generate/propagate logic; in classic 4-bit groups, a commonly cited figure is around 6 * tpd.

Step-by-Step Solution:

Verification / Alternative check:

Timing textbooks and gate-level analyses agree on linear versus accelerated carry timing; CLA groups reduce depth drastically compared with ripple chains.

Why Other Options Are Wrong:

Any answer placing ripple at (2n − 1)*tpd or serial at (n − 1)*tpd contradicts their known timing behavior; mapping CLA to size-independent timing is a qualitative statement, whereas the option provides a specific 4-bit figure.

Common Pitfalls:

Confusing per-bit serial timing with combinational critical-path delay; forgetting that CLA implementations vary but remain far faster than ripple for wider words.

Final Answer:

A-1, B-2, C-4