Match microprocessors to typical general-purpose register widths: (A) Intel 8085, (B) Intel 8086, (C) Motorola 68000.

Introduction / Context:
Register width determines native data handling and influences instruction set design. This question links three foundational CPUs to the bit-width of their general-purpose registers commonly cited in textbooks and exams.

Given Data / Assumptions:

• 8085: 8-bit accumulator and general-purpose registers (with 16-bit register pairs for addressing/arithmetic).
• 8086: 16-bit general-purpose registers (AX, BX, CX, DX, etc.).
• 68000: 32-bit data and address registers internally (despite a 16-bit external data bus).

Concept / Approach:
Use the canonical teaching mapping: 8085 → 8-bit (often referenced as 8/16 because of register pairs), 8086 → 16-bit, 68000 → 32-bit registers. The option set encodes 8085 as 8/16 to reflect pair usage.

Step-by-Step Solution:

Verification / Alternative check:
Manuals: 8085 has 8-bit A, B, C, D, E, H, L; 8086 has 16-bit AX..DX; 68000 provides D0–D7 and A0–A7 as 32-bit registers internally.

Why Other Options Are Wrong:

• A-1, B-2, C-3: Assigns 32-bit to 8085 erroneously.
• A-2, B-3, C-1: Swaps 8085 and 8086 widths.
• A-3, B-1, C-2: Assigns 32-bit to 8086 and 16-bit to 68000—incorrect.

Common Pitfalls:

• Confusing bus width with register width (68000’s 16-bit bus vs 32-bit registers).
• Forgetting 8085’s register-pair operations (BC, DE, HL) do not make it a native 16-bit CPU.

Final Answer:
A-3, B-2, C-1