Relative speed of MOS technologies: Compared with P-MOS logic families, which technology is typically about twice as fast due to higher carrier mobility and lower on-resistance for similar geometries?

Introduction / Context:
MOS technologies historically appeared as separate single-polarity families (P-MOS and N-MOS) before complementary CMOS became dominant. Speed differences between P-MOS and N-MOS arise chiefly from the underlying carrier mobility and device physics that govern channel conductance and switching performance.

Given Data / Assumptions:

• P-MOS devices conduct via holes; N-MOS devices conduct via electrons.
• Electron mobility exceeds hole mobility in silicon by roughly a factor of two to three under common conditions.
• For similar channel dimensions and biases, higher mobility translates to lower channel resistance and faster switching.

Concept / Approach:
The key point is charge carrier mobility: electrons move more readily than holes. Because N-MOS uses electrons as majority carriers, N-MOS gates can charge and discharge nodes faster than comparable P-MOS gates, yielding the rule-of-thumb that N-MOS is about twice as fast as P-MOS in otherwise similar implementations.

Step-by-Step Solution:

Verification / Alternative check:
Process documentation and textbooks list electron mobility significantly larger than hole mobility; historical NMOS microprocessors outpaced PMOS predecessors at similar supply voltages and feature sizes.

Why Other Options Are Wrong:

Common Pitfalls:
Confusing CMOS (which uses both pMOS and nMOS) with single-polarity comparisons; overlooking that actual system speed also depends on wiring capacitance and load conditions.

Final Answer:
N-MOS