Difficulty: Easy
Correct Answer: Propagation delay
Explanation:
Introduction / Context:
Digital systems rely on predictable timing. When an input changes, the output does not respond instantaneously due to internal device delays, loading, and technology characteristics. The parameter that captures this input-to-output timing is central to synchronous design and timing closure.
Given Data / Assumptions:
Concept / Approach:
Propagation delay is the interval between a defined input threshold crossing and the corresponding output threshold crossing. It is distinct from rise/fall time, which describes the slope of the output transition itself, and from fan-out, which is a drive-capability metric rather than a timing parameter.
Step-by-Step Solution:
Verification / Alternative check:
Check any logic family datasheet timing diagrams; tpLH and tpHL are clearly enumerated as propagation delays, usually under specified load and Vcc conditions.
Why Other Options Are Wrong:
Common Pitfalls:
Confusing output edge rates with total delay; ignoring that different transitions may have different delays; overlooking the load and temperature dependence of delays.
Final Answer:
Propagation delay
Discussion & Comments