Curioustab
Aptitude
General Knowledge
Verbal Reasoning
Computer Science
Interview
Aptitude
General Knowledge
Verbal Reasoning
Computer Science
Interview
Home
»
Digital Electronics
»
Digital System Projects Using HDL
In the keypad application, when all columns are HIGH, the ring counter is enabled and counting, and dav is LOW, what is the status of the d outputs?
On
Hi-Z
1011
Correct Answer:
Hi-Z
← Previous Question
Next Question→
More Questions from
Digital System Projects Using HDL
How is the output frequency related to the sampling interval of a frequency counter?
What does the major block of an HDL code emulation of a keypad include?
Why should a real hardware functional test be performed on the HDL stepper motor design?
The accuracy of the frequency counter depends on the:
Which is not a major block of an HDL frequency counter?
In the digital clock project, the purpose of the frequency prescaler is to:
In the frequency counter, what is the function of the Schmitt trigger circuit?
In a digital clock application, the basic frequency must be divided down to:
Which is not a step used to define the scope of an HDL project?
In the frequency counter, when is the new count stored in the display register?
Discussion & Comments
No comments yet. Be the first to comment!
Name:
Comment:
Post Comment
Join Discussion
Discussion & Comments