Flash ADC encoding method: A simultaneous (multiple-comparator) or flash A/D converter uses parallel encoding. Evaluate this statement.

Introduction / Context:
In a flash ADC, the input is compared simultaneously to many reference levels, and the set of comparator outputs forms a thermometer code. This must then be converted, or encoded, into a binary number by a parallel digital encoder. The statement tests recognition of that parallel nature.

Given Data / Assumptions:

• Architecture: flash/simultaneous ADC.
• Comparator bank produces a thermometer code.
• Digital block performs thermometer-to-binary encoding concurrently.

Concept / Approach:
Because all thresholds are tested at the same instant, the encoding is inherently parallel: the complete code word is produced without iterative steps. This sharply contrasts with SAR ADCs (which perform sequential approximation) and sigma-delta ADCs (which shape and decimate a 1-bit or few-bit stream). Therefore, saying flash ADCs “use parallel encoding” is accurate.

Step-by-Step Solution:

Verification / Alternative check:
Block diagrams for flash converters always show ladder, comparator array, and a fast encoder; there is no iterative decision loop.

Why Other Options Are Wrong:

Common Pitfalls:
Confusing the parallel encoding of flash with pipeline stages or SAR bit trials; only flash produces the full code in a single comparison step.

Final Answer:
Correct