Practical resolution limit of a binary-weighted resistor DAC: Due to resistor ratio spread and switch accuracy, a binary-weighted resistor DAC is typically practical up to approximately how many bits of resolution?

Introduction / Context:
There are two classic DAC core topologies: binary-weighted resistor DACs and R–2R ladders. While binary-weighted designs are conceptually simple, they demand precise resistor ratios that become increasingly difficult to realize as resolution increases.

Given Data / Assumptions:

• Ideal binary-weighted DAC requires exact 1R, 2R, 4R, 8R, … ratios.
• Real components have tolerances and temperature coefficients.
• Switch on-resistance and parasitics disturb higher-order bit accuracy.

Concept / Approach:
Each additional bit doubles the resistor ratio range. By 8 bits, the largest/smallest resistor differ by 128:1. Maintaining accurate ratios across that span with discrete parts or even on-chip passive elements becomes challenging and expensive. Errors lead to DNL/INL problems and potential non-monotonic behavior. Thus, practical binary-weighted DACs rarely exceed about 8 bits; for higher resolution, the R–2R ladder is preferred because it uses only two resistor values, easing matching requirements.

Step-by-Step Solution:

Verification / Alternative check:
Historical practice: discrete binary-weighted DACs (audio/motion control) top out near 8 bits; higher-resolution DAC ICs predominantly use R–2R or segmented architectures.

Why Other Options Are Wrong:

• 10 bits: Possible only with very tight matching/trim, not “practical” broadly.
• 2 or 4 bits: Undersell the feasible range; common binary-weighted designs exceed this.

Common Pitfalls:
Assuming “more bits” just means adding more resistors; ignoring that resistor and switch errors scale unfavorably with bit count in this topology.

Final Answer:
8 bits