Shift-register data movement: does a serial-in, parallel-out (SIPO) register itself transfer data from one parallel bus to another via a single line, or is that achieved by a PISO + serial link + SIPO chain?

Introduction / Context:
Shift registers are versatile: SIPO (serial-in, parallel-out) and PISO (parallel-in, serial-out) enable format conversion. The question distinguishes what a SIPO alone can do versus what is required to move data from one parallel bus to another over a single serial line.

Given Data / Assumptions:

• SIPO accepts serial data, then presents it in parallel.
• PISO captures parallel data and emits it serially.
• “Transfer between parallel buses via one line” implies serialize → send → deserialize.

Concept / Approach:
A SIPO by itself lacks a parallel input; it cannot capture a parallel bus directly. True bus-to-bus transfer over a single conductor requires first converting the source bus to serial (PISO), then transporting the serial stream, then reconstructing parallel data at the destination (SIPO). Many microcontroller interfaces (e.g., SPI with shift-register expanders) use precisely this chain for I/O expansion.

Step-by-Step Solution:

Verification / Alternative check:
Common chips: 74HC165 (PISO) and 74HC595 (SIPO). Pairing them enables parallel capture, serial transmission, and parallel recreation.

Why Other Options Are Wrong:
SIPO alone: lacks parallel input, cannot originate the transfer.
Tri-state and Johnson-counter references do not change the functional requirement for serialization and deserialization.

Common Pitfalls:
Assuming any shift register can perform both directions; forgetting that “serial-in” and “parallel-in” are distinct device features.

Final Answer:
Incorrect; a PISO, then serial link, then SIPO performs that function