Counter-ramp (single-slope) ADC versus successive-approximation ADC: which statement is correct?
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ACounter-ramp ADC is much faster than a successive-approximation ADC
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BIn SAR, the final code is always slightly less than the analog input; counter-ramp is slightly more
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CIn SAR, the final code is always slightly more than the analog input; counter-ramp is slightly less
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DNone of the above
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EBoth are identical in speed and code bias
Answer
Correct Answer: None of the above
Explanation
Introduction / Context:ADC architectures differ in speed and operation. Counter-ramp ADCs count up from zero; SAR ADCs perform a binary search. This question checks high-level distinctions without getting lost in rare corner behaviors.
Given Data / Assumptions:
- Counter-ramp conversion time varies with input level and is generally slow.
- SAR conversion time is fixed at roughly n comparison steps for n-bit resolution.
- No universal bias of “always more” or “always less” applies as phrased.
Concept / Approach:SAR ADCs are typically much faster than counter-ramp ADCs because a binary search converges in n steps regardless of input. Statements about “always more” or “always less” final codes are oversimplifications; quantization rounding depends on comparator behavior and design details.
Step-by-Step Solution:Evaluate (A): false—counter-ramp is slower, not faster.Evaluate (B) and (C): incorrect generalizations about code bias.Therefore the correct choice is “none of the above.”
Verification / Alternative check:Consult timing diagrams: SAR uses n trial comparisons; counter-ramp may need up to 2^n counts, clearly slower for moderate n.
Why Other Options Are Wrong:A: Reverses the known speed relationship.B, C: Express absolute biases that are not generally true across implementations.E: False; they are different in both speed and operation.
Common Pitfalls:Assuming “bias” rules exist universally for all ADCs; in reality, rounding and comparator hysteresis are implementation specifics.
Final Answer:None of the above