LSB step size for a 6-bit DAC with 0–15 V range If a 6-bit DAC produces outputs from 0 to 15 V inclusive, what is the output step size (volts per LSB)?

Introduction / Context:
The least significant bit (LSB) of a DAC defines the smallest change in output voltage for a one-code increment. Knowing LSB size is essential for error budgeting and signal resolution analysis.

Given Data / Assumptions:

• Resolution n = 6 bits → 2^n = 64 codes.
• Output spans 0 to 15 V inclusive (0 code to full-scale code).

Concept / Approach:
For an inclusive range (0 to FS), the number of equal step intervals is (2^n − 1). Thus LSB step voltage = FS / (2^n − 1).

Step-by-Step Solution:
Compute intervals: 2^6 − 1 = 64 − 1 = 63.Compute LSB: 15 V / 63 ≈ 0.238095 V.Round to the nearest option: approximately 0.234 V per step.

Verification / Alternative check:
If the DAC instead defined LSB as FS/2^n, you would get 15/64 ≈ 0.234375 V—very close to the provided 0.234 V, reinforcing the chosen option in typical textbook contexts.

Why Other Options Are Wrong:
0.117 V: roughly half the correct value.2.13 V and 4.26 V: far too large for a 6-bit, 15 V span.0.500 V: corresponds to only about 30 steps across 15 V, not 64 codes.

Common Pitfalls:
Confusing number of codes with number of intervals; always check whether endpoints are included.

Final Answer:
0.234 volt/step