Edge-triggered flip-flops — identifying the internal circuit In synchronous digital design, which internal circuit is primarily responsible for certain flip-flops being designated as edge-triggered (i.e., responding only at the clock transition rather than throughout the clock level)?

Introduction / Context:
An edge-triggered flip-flop changes state only during a brief instant when the clock transitions (rising or falling edge). This behavior contrasts with level-sensitive latches, which remain transparent while their enable level is asserted. Understanding what internal circuit enforces this edge-only sensitivity is crucial for reliable synchronous system design.

Given Data / Assumptions:

• The device should respond at the clock edge (LOW→HIGH or HIGH→LOW), not during the entire HIGH or LOW level.
• We are comparing possible internal building blocks: edge-detection circuit, NOR/NAND latches, and pulse-steering.
• Setup and hold time requirements must still be met around the sampling instant.

Concept / Approach:
Edge-triggered flip-flops typically synthesize a very narrow sampling pulse from the transition of the external clock. This internal, short-duration pulse gates the data path only momentarily, thereby preventing the output from tracking input changes during the steady HIGH or LOW clock levels. The functional element that creates this pulse is the edge-detection circuit (also called a pulse transition detector).

Step-by-Step Solution:

Verification / Alternative check:
Inspect logic diagrams of common edge-triggered D/JK flip-flops; you will find differentiating networks or logic that create a spike (narrow pulse) from the clock transition to gate data transfer briefly.

Why Other Options Are Wrong:

• NOR latch / NAND latch: these are storage primitives; by themselves they are level-sensitive, not edge-triggered.
• Pulse-steering circuit: used in master–slave or gating arrangements but does not inherently create the edge-only sampling pulse.

Common Pitfalls:
Assuming that fast response alone makes a device edge-triggered; without a pulse transition detector, the device would still be sensitive across a level, not just the edge.

Final Answer:
edge-detection circuit.