Frequency division using cascaded flip-flops A frequency divider consists of 12 cascaded toggle flip-flops (each divides by 2). If the input clock is 20.48 MHz, determine the output frequency after the twelfth stage.

Introduction / Context:
Cascaded flip-flops are widely used to divide down a high-frequency clock to lower rates for timing, baud-rate generation, and scanning. Each flip-flop in toggle mode halves the frequency at its output, so N stages divide by 2^N overall. This problem checks your ability to apply that rule and handle units correctly.

Given Data / Assumptions:

• Number of stages N = 12.
• Each stage divides by 2 in toggle mode.
• Input frequency fin = 20.48 MHz.

Concept / Approach:
The overall division factor is 2^N. Compute 2^12 and divide the input frequency accordingly. Ensure conversion from MHz to kHz if required when comparing to options.

Step-by-Step Solution:

Verification / Alternative check:
Stage-by-stage view: 20.48→10.24→5.12→2.56→1.28→0.64→0.32→0.16→0.08→0.04→0.02→0.01→0.005 MHz = 5 kHz; the twelfth stage indeed yields 5 kHz.

Why Other Options Are Wrong:

• 10.24 kHz: corresponds to one stage fewer (divide by 2048).
• 30.24 kHz and 15 kHz: do not correspond to any power-of-two divisions from 20.48 MHz.

Common Pitfalls:
Miscounting the number of stages or forgetting that each stage divides by exactly 2, not by 10 or another factor.

Final Answer:
5 kHz